JPS61197741U - - Google Patents

Info

Publication number
JPS61197741U
JPS61197741U JP8207985U JP8207985U JPS61197741U JP S61197741 U JPS61197741 U JP S61197741U JP 8207985 U JP8207985 U JP 8207985U JP 8207985 U JP8207985 U JP 8207985U JP S61197741 U JPS61197741 U JP S61197741U
Authority
JP
Japan
Prior art keywords
circuit
oscillation
tuner
supplied
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8207985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8207985U priority Critical patent/JPS61197741U/ja
Publication of JPS61197741U publication Critical patent/JPS61197741U/ja
Pending legal-status Critical Current

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  • Superheterodyne Receivers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のDBSチユーナの基本的回路
を示すブロツク図、第2図イは前記チユーナケー
スを示す正面図、同図ロは該ケースの側面図、第
3図は前記ケース内に組込まれたチユーナの全体
を示すブロツク図、第4図は該チユーナの具体的
回路を示す図、第5図は従来のDBSチユーナの
全体構成を示す図である。 2……局部発振回路、3a,3b……プリスケ
ーラ回路、5……チユーナケース。
FIG. 1 is a block diagram showing the basic circuit of the DBS tuner of the present invention, FIG. 2 A is a front view of the tuner case, B is a side view of the case, and FIG. FIG. 4 is a block diagram showing the entire structure of a conventional DBS tuner, FIG. 4 is a diagram showing a specific circuit of the tuner, and FIG. 5 is a diagram showing the overall configuration of a conventional DBS tuner. 2... Local oscillation circuit, 3a, 3b... Prescaler circuit, 5... Tuner case.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 混合回路に所望される周波数の発振信号を局部
発振回路で発振させると共にその発振出力の一部
をチユーナケースに内蔵された複数段接続した状
態からなるプリスケーラ回路に供給し、所定の周
波数に分周するように構成した衛星放送受信用チ
ユーナ。
A local oscillation circuit oscillates an oscillation signal with a frequency desired by the mixing circuit, and a portion of the oscillation output is supplied to a prescaler circuit built in the tuner case, which is connected in multiple stages, and is divided into a predetermined frequency. A satellite broadcast reception tuner configured as follows.
JP8207985U 1985-05-30 1985-05-30 Pending JPS61197741U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8207985U JPS61197741U (en) 1985-05-30 1985-05-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8207985U JPS61197741U (en) 1985-05-30 1985-05-30

Publications (1)

Publication Number Publication Date
JPS61197741U true JPS61197741U (en) 1986-12-10

Family

ID=30629472

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8207985U Pending JPS61197741U (en) 1985-05-30 1985-05-30

Country Status (1)

Country Link
JP (1) JPS61197741U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412591A (en) * 1977-06-30 1979-01-30 Reedaa Kontorooru Shisutemuzu Doppler radar module

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412591A (en) * 1977-06-30 1979-01-30 Reedaa Kontorooru Shisutemuzu Doppler radar module

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