JPS6123473A - Dc reproducing circuit - Google Patents

Dc reproducing circuit

Info

Publication number
JPS6123473A
JPS6123473A JP59143660A JP14366084A JPS6123473A JP S6123473 A JPS6123473 A JP S6123473A JP 59143660 A JP59143660 A JP 59143660A JP 14366084 A JP14366084 A JP 14366084A JP S6123473 A JPS6123473 A JP S6123473A
Authority
JP
Japan
Prior art keywords
circuit
output
video
video signal
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59143660A
Other languages
Japanese (ja)
Inventor
Tadashi Kubota
正 窪田
Yoshiyuki Asahina
義幸 朝比奈
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59143660A priority Critical patent/JPS6123473A/en
Publication of JPS6123473A publication Critical patent/JPS6123473A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/16Circuitry for reinsertion of DC and slowly varying components of signal; Circuitry for preservation of black or white level

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To obtain stable display quality by adding an emitter follower circuit to an output of a DC reproducing circuit to make the output of a video circuit constant so as to prevent ringing and uneven luminance. CONSTITUTION:The DC reproducing circuit 10 has a structure that an emitter follower circuit 11 is added to an output of the DC reproducing circuit 5 and an integration capacitor C2 is not directly connected to a video output circuit 2 and the charging to the integration capacitor C2 when a video signal is turned off is avoided by a transistor 12. As a result, the discharge from the integration capacitor C2 when a video signal is turned off is avoided by a transistor 12. As a result, the discharge from the integration capacitor C2 to a coupling capacitor C1 is lost and after display such as solid all over the pattern is applied for several sec and even when the display is changed or repeated, no ringing is generated.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はテレビシロン、ディスプレイ装置等のビデオ回
路の出力を、ビデオ信号のパルス幅の大小に関係なく、
一定レベルを保持できるようにした直流再生回路に関す
る。
[Detailed Description of the Invention] [Industrial Field of Application] The present invention allows the output of video circuits such as televisions, display devices, etc. to be controlled regardless of the pulse width of the video signal.
This invention relates to a DC regeneration circuit that can maintain a constant level.

情報処理分野では、出力装置としてテレビジョン、ディ
スプレイ等の表示装置が用いられており、表示装置は文
字、記号および図形婢を1時的にブラウン管面に表示す
るが、表示データはビデオ信号として送られる。
In the information processing field, display devices such as televisions and displays are used as output devices.Display devices temporarily display characters, symbols, and graphics on a cathode ray tube, but the display data is sent as a video signal. It will be done.

送られてきたビデオ信号はビデオ回路によりブラウン管
を駆動する電圧に増幅したビデオ信号を出力することに
より画面表示が行われる。このとき、ビデオ回路からの
ビデオ出力が入力するビデオ信号のパルス幅の大小によ
り直流レベルが変動するので、ビデオ回路に直流再生回
路を設け、ビデオ回路から出力する直流レベルを一定に
保持する必要がある。
The sent video signal is amplified by a video circuit to a voltage that drives a cathode ray tube, and is outputted to be displayed on the screen. At this time, the DC level of the video output from the video circuit varies depending on the pulse width of the input video signal, so it is necessary to provide a DC regeneration circuit in the video circuit to maintain a constant DC level output from the video circuit. be.

〔従来の技術〕[Conventional technology]

第2図は従来の直流再生回路を備えたビデオ回路を示す
。図において、ビデオ入力回路lに入力されたビデオ信
号はカップリングコンデンサC1を介してビデオ出力回
路2に人力し、ビデオ出力回路2においてブラウン管を
駆動する電圧に増幅して、ブラウン管(CRT)カソー
ドに出力される。
FIG. 2 shows a video circuit with a conventional DC regeneration circuit. In the figure, a video signal input to a video input circuit 1 is input to a video output circuit 2 via a coupling capacitor C1, and is amplified in the video output circuit 2 to a voltage that drives a cathode ray tube (CRT). Output.

なお、3はトランジスタ、4は電源、rは抵抗を示す。Note that 3 represents a transistor, 4 represents a power supply, and r represents a resistance.

上記ビデオ出力回路2の出力を一定に保持するための直
流再生回路5は増幅器(アンプ)6とトランジスタフと
ダーイオード8をHeコンデソサCtより構成される。
A DC reproduction circuit 5 for holding the output of the video output circuit 2 constant is composed of an amplifier 6, a transistor, a diode 8, and a He capacitor Ct.

第3図に示ずvslH5はブラウン管のスクリーンを掃
引する同期信号であり、このHs倍信号直流再生回路5
のトランジスタ7が受けて動作する。
vslH5, which is not shown in FIG.
The transistor 7 receives the signal and operates.

トランジスタ7がOF’Fの間アンプ6の出力はダイオ
ード8を通し、コンデンサC2に蓄積される。
While the transistor 7 is OFF, the output of the amplifier 6 passes through the diode 8 and is accumulated in the capacitor C2.

この酸土をビデオ出力回路2に帰還することにより第3
図に示すように、ビデオ信号のパルス幅の大、小に」;
リビデオ出力の暗レベルがAのように変動するのを押え
、Bのように暗レベルを一定にする。
By feeding back this acid soil to the video output circuit 2, the third
As shown in the figure, the pulse width of the video signal is large or small.
To suppress the fluctuation of the dark level of the video output as shown in A, and keep it constant as shown in B.

〔発明が解決し仁うとする問題点〕[Problems that the invention attempts to solve]

しかしながら全画面ベタのよちな表示を、第4図に示す
ビデオ信号により数秒行つ1こ後、表示を変えたり、ま
たはそのくり返し等の特殊機能を行なう場合、従来の直
流再生回路5では切替り時、図示のようなリンキング9
が起き、暗レベルが一瞬明レベルになるため、ラスタが
表示されてしまうという問題点がある。
However, when performing special functions such as changing the display after a few seconds of displaying an all-screen solid image using the video signal shown in FIG. When, linking 9 as shown
occurs, and the dark level momentarily changes to the bright level, causing the problem that the raster is displayed.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題別はビデオ回路の出力を一定にするための直流
再生回路の出力1へエミッタフォロア回路を付加した本
発明の直流再生回路によって解決される。
The above problems are solved by the DC regeneration circuit of the present invention, which includes an emitter follower circuit added to the output 1 of the DC regeneration circuit for making the output of the video circuit constant.

〔作 用〕[For production]

即ち、直流再生回路の出力にエミッタフォロア回路を付
加し、ビデオ出力回路の人力と直流再生回路の積分コン
デンサの直結を避けることにより、ビデオ信号のOTl
’F時の積分コンデンサC1への充電をなくシ、切替わ
り時にラスタの表示されることが防止できる。
That is, by adding an emitter follower circuit to the output of the DC regeneration circuit and avoiding direct connection between the human power of the video output circuit and the integrating capacitor of the DC regeneration circuit, it is possible to
By eliminating the charging of the integrating capacitor C1 at F, it is possible to prevent the raster from being displayed at the time of switching.

さらに、ビデオ信号のパルス幅の変化によるビデオ出力
回路のT)Cレベルの変化が防げ、輝度ムラのない安定
した表示品質が得られる。
Furthermore, changes in the T)C level of the video output circuit due to changes in the pulse width of the video signal can be prevented, and stable display quality without uneven brightness can be obtained.

〔実室例〕[Real room example]

以下一本発明の要旨を図面により具体的に説明する。 The gist of the present invention will be specifically explained below with reference to the drawings.

第1図&lは本発明の一実施例を説明するブロック図、
第1色目は第1図(イ)の直流再生回路の詳細図で、全
図を通じて同一符号は同一対象物をボす。
FIG. 1 &l is a block diagram illustrating an embodiment of the present invention;
The first color is a detailed diagram of the DC regeneration circuit shown in FIG. 1(a), and the same symbols indicate the same objects throughout the diagrams.

図において、直流再生回路10は第2図に示す梯来の直
流再生回路、5の出力に、エミッタフォロア回路11を
付加して、積分コンデンサC2をビデオ出力回路2に直
結させない構造とした。
In the figure, the DC regeneration circuit 10 has a structure in which an emitter follower circuit 11 is added to the output of the ladder DC regeneration circuit 5 shown in FIG. 2 so that the integrating capacitor C2 is not directly connected to the video output circuit 2.

エミッタフォロア回路11は第1図([:I)に示すよ
うにトランジスタ12と抵抗rよりなり、ビデオ出力信
号の変化分を補う直流分をビデオ出力回路2にフィード
バックする。他は第2図と同様であり、説明は省略する
The emitter follower circuit 11 is made up of a transistor 12 and a resistor r, as shown in FIG. The rest is the same as in FIG. 2, and the explanation will be omitted.

上記トランSラスタ12により、ビデオ信号のOFF時
の積分コンデンサC2への充電がなくなる。その結果、
積分コンデンサC!よりカップリングコンデンサC1へ
の放電がなくなり、例えば前述した全画面ベタのような
表示を数秒行った後、表示を変えたり、またはくり返し
ても、第4図に示すよちなリンキング9が発生しない。
The transformer S raster 12 eliminates charging of the integrating capacitor C2 when the video signal is OFF. the result,
Integral capacitor C! As a result, the coupling capacitor C1 is no longer discharged, and even if the display is changed or repeated after the above-mentioned full-screen solid display is performed for several seconds, the erratic linking 9 shown in FIG. 4 does not occur.

従って、ラスタが表示されることもなく、ビデオ信号パ
ルス幅の変化による輝度ムラを防ぎ安定した表示が行え
る。
Therefore, no raster is displayed, and stable display can be achieved by preventing brightness unevenness due to changes in the video signal pulse width.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば従来の直流再生回
路の出力に、エミッタフォロア回路を付加し、ビデオ出
力回路の人力と直流再生回路の積分コンデンサの直結を
避けることによりリンキングを防止し、ビデオ信号のパ
ルス幅の変化による輝度ムラを防ぎ、安定した表示品質
が得られる。
As explained above, according to the present invention, an emitter follower circuit is added to the output of a conventional DC regeneration circuit, and linking is prevented by avoiding direct connection between the human power of the video output circuit and the integrating capacitor of the DC regeneration circuit. This prevents brightness unevenness caused by changes in the pulse width of the video signal and provides stable display quality.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(イ)は本発明の一実施例を説明するブロック図
、 第1図(ロ)は第1図(イ)の直流再生回路の詳細図、
第2図は従来の直流再生回路を備えたビデオ回路図、 第3図はビデオ信号パルス幅の変化に滲うビデオ出力を
説明する図、 第4図はリンキングを説明するための図である。 図において、 lはビデオ入力回路、2はビデオ出力回路、3はトラン
ジスタ、4は電源、6は増幅器、7はトランジスタ、・
8はダイオード、lOは直流再生回路、11はエミンタ
フォロア回路、12はトランジスタを示す。
FIG. 1(a) is a block diagram explaining one embodiment of the present invention, FIG. 1(b) is a detailed diagram of the DC regeneration circuit of FIG. 1(a),
FIG. 2 is a diagram of a video circuit equipped with a conventional DC reproduction circuit, FIG. 3 is a diagram illustrating video output that is affected by changes in video signal pulse width, and FIG. 4 is a diagram illustrating linking. In the figure, l is a video input circuit, 2 is a video output circuit, 3 is a transistor, 4 is a power supply, 6 is an amplifier, 7 is a transistor, etc.
8 is a diode, IO is a DC regeneration circuit, 11 is an eminter follower circuit, and 12 is a transistor.

Claims (1)

【特許請求の範囲】[Claims] ビデオ回路のビデオ出力の暗レベルの変化を検出し、そ
の変化を補うための直流分を前記ビデオ回路に帰還し、
該ビデオ回路の出力を一定にする直流再生回路において
、該直流再生回路の出力に、エミッタフォロア回路を付
加したことを特徴とする直流再生回路。
detecting a change in the dark level of the video output of the video circuit, and feeding back a DC component to the video circuit to compensate for the change;
1. A DC regeneration circuit for making the output of the video circuit constant, characterized in that an emitter follower circuit is added to the output of the DC regeneration circuit.
JP59143660A 1984-07-11 1984-07-11 Dc reproducing circuit Pending JPS6123473A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59143660A JPS6123473A (en) 1984-07-11 1984-07-11 Dc reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59143660A JPS6123473A (en) 1984-07-11 1984-07-11 Dc reproducing circuit

Publications (1)

Publication Number Publication Date
JPS6123473A true JPS6123473A (en) 1986-01-31

Family

ID=15343961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59143660A Pending JPS6123473A (en) 1984-07-11 1984-07-11 Dc reproducing circuit

Country Status (1)

Country Link
JP (1) JPS6123473A (en)

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