JPS61270954A - Line supervising device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a line monitoring device that receives line information and monitors the line.

Prior Art FIG. 3 shows the configuration of a conventional line monitoring device. In FIG. 3, 301 is a data reading register 302 for reading data on the line, a data holding unit that holds read data in l character units, 303 is a synchronization character detection unit, 304 is a line information storage unit, and 305 is a line information storage unit. An information display section 306 is a main control section for storing and displaying line information, 307 is a reading timing generation section for line information and interconnection circuit status, and 308 is an interconnection circuit status reading section. The operation will be explained according to FIG.

The data reading register 301 sequentially reads line information bit by bit, and the data holding unit 302 holds this information in units corresponding to one character length.

A read signal for holding is output from the read timing generating section 307. The held line information is sent to the main control section 306 and further written into the line information storage section 304 and the line information display section 305. Thereby, the line information is displayed in real time at the same time as it is stored. on the other hand,
The state of the interconnection circuit associated with the line information is read into the state reading unit 308 by a signal 4 for holding the line information, and is further sent to the main control unit 306. Main control section 3
06, the state of the interconnection circuit is stored in the line information storage unit 3.
04 and the line information display section 305,
It is stored and displayed in the same way as the line information. The synchronization character detection section 303 outputs a synchronization detection signal when a synchronization code appears on the line, thereby allowing information reading timing to be read in information characters.

Problems to be Solved by the Invention In the conventional line monitoring device described above, line information and the status of interconnection circuits are displayed in real time and simultaneously stored in the line information storage unit 304 for use in analyzing phenomena. The line information is read in character units to reduce the load on the main control unit 306.

The information of the interconnection circuit is also reduced in the amount of stored information, the load on the control section is reduced, and the control line often changes depending on the character, so the line information 1 is
At the same time when reading the character, mutual liquid i circuit information (1
This takes the form of reading bits). Therefore, since the interconnection circuit information is read at the time interval of one line information character, the interconnection circuit status is O within the reading interval.
When the state changes from N to 0FF-ON,
There was a problem that it was not possible to detect 0FFI.

The present invention solves the above-mentioned conventional problems, and provides a line monitoring device that can reliably detect state changes within one character.

Means for Solving the Problems In order to achieve the above object, the present invention provides an interconnection circuit state change retaining method that, when the interconnection circuit state changes within a reading interval, retains the state change until the next reading. By providing a circuit, it is possible to reliably detect the change in state.

According to the present invention, with the above-described configuration, changes in the state of the interconnection circuit within one character time are held by the holding circuit, so that the line data and the accompanying interconnection circuit can be stored with the same load and storage capacity of the main control section as in the prior art. This has the effect that the state can be reliably captured, stored, and displayed without missing anything.

Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention.
102 is a line data reading register, 102 is a data holding section that holds the read data, 103 is a synchronization character detection section, 109 is an interconnection circuit state reading section, 108 is an interconnection circuit state change holding section, and 107 is a generation of read timing. 104 is a line information storage unit,
105 is a line information display section, and 106 is a main control section that performs control for displaying and storing line data and interconnection circuit status. The operation will be explained according to FIG. The line data reading section 101 sequentially reads line data, and holds this for one character in the data holding section 102 in response to the read signal 4 from the timing generating section 107. usually,
Before the synchronization character is detected, the timing generating section 107 is free-running, and data is held in the data holding section 102 by the read signal 4 outputted from the timing generating section 107. At the same timing, the interconnection circuit state reading section 109 reads the state. When a synchronization character is received, a synchronization detection signal 3 is output from the synchronization character detection section 103. The timing generating section 107, which had been running on its own, now outputs the read signal 4 synchronized with the character based on the synchronization detection signal 3, so that the correct character data is read and displayed. The interconnection circuit state change holding unit 108 ensures that the state of the interconnection circuit can be read when the state of the interconnection circuit changes as shown in 2 in FIG. In addition, as shown in 3 in FIG. 2, it is used to hold the data until the next reading. This makes it possible to reliably detect changes in the state of interconnection circuits within one character time, which could not be detected conventionally. Note that FIG. 2 shows the timing of signals 1 to 4 in FIG. 1.

Effects of the Invention According to the present invention, it is possible to reliably detect a change in state within one character time, which could not be detected conventionally, with the same load and storage capacity of the main control section as in the prior art.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a line monitoring device according to an embodiment of the present invention, FIG. 2 is a timing diagram of the same device, FIG. 3 is a block diagram of a conventional device, and FIG. 4 is a timing diagram of the same device. 101...Line data reading register, 102.
...Data holding section, 103...Synchronization character detection section, 104...Line information storage section, 1
05...Line information display section, 106...
Main control section, 107... Timing generation section, 10
8...Interconnection circuit state change holding section, 109.
...Interconnection circuit status reading section. Name of agent: Patent attorney Toshio Nakao and one other person Page 3, No. 4 Figure 3: Kakugome - Reno

Claims (1)

[Claims] data reading means for reading communication data of various synchronization methods on the line character by character; interconnection circuit state reading means for reading the states of various interconnection circuits associated with the communication data; and state changes of the interconnection circuits. 1. An interconnection circuit state change retaining means for retaining the state change until the next time the state change occurs when the state change occurs within a state capture interval.