JPS6130896U - Clock alarm stop circuit - Google Patents
Clock alarm stop circuitInfo
- Publication number
- JPS6130896U JPS6130896U JP11584984U JP11584984U JPS6130896U JP S6130896 U JPS6130896 U JP S6130896U JP 11584984 U JP11584984 U JP 11584984U JP 11584984 U JP11584984 U JP 11584984U JP S6130896 U JPS6130896 U JP S6130896U
- Authority
- JP
- Japan
- Prior art keywords
- alarm
- circuit
- notification
- stop
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例に係るアラーム付時計のブロ
ック回路図。
第２−は本考案の一実施例に係るアラーム付時計の外観
を示す斜視区。
第３図は本考案の一実施例に係るアラーム付時計の正面
図。
第４図は第２図のＡ−Ａ線断面図。第５図は第１図にお
ける操作順序記憶回路の詳細な回路図。
第６図は第１図における音量低減回路および発音回路の
詳細な回路図。
第７図〜第９図は、アラームの鳴り止め操作形態を示す
斜視図。
第１０図、第１１図は本実施例におけるアラーム時計の
鳴り止め操作を示すタイムチャート。
２６ａ・２６ｂ・２６ｃ・２６ｄ・・・載置状態検出ス
イッチ、３０・・・基準信号発生器、３６・・・時刻表
示部、４４・・・アラーム報知回路、５４・・・報知音
発生回路、５６・・・音量低減回路。FIG. 1 is a block circuit diagram of an alarm clock according to an embodiment of the present invention. 2nd- is a perspective view showing the appearance of an alarm watch according to an embodiment of the present invention. FIG. 3 is a front view of an alarm watch according to an embodiment of the present invention. FIG. 4 is a sectional view taken along line A-A in FIG. 2. FIG. 5 is a detailed circuit diagram of the operation order storage circuit in FIG. 1. FIG. 6 is a detailed circuit diagram of the volume reduction circuit and sound generation circuit in FIG. 1. FIG. 7 to FIG. 9 are perspective views showing an operation mode for stopping the alarm from sounding. FIG. 10 and FIG. 11 are time charts showing the operation to stop the alarm clock ringing in this embodiment. 26a, 26b, 26c, 26d... Placement state detection switch, 30... Reference signal generator, 36... Time display unit, 44... Alarm notification circuit, 54... Notification sound generation circuit, 56...Volume reduction circuit.
Claims (3)
刻用基準信号により時刻を表示する時刻表示部と、予め
設定された時刻に報知信号を出力するアラーム報知回路
と、前記アラーム報知回路からの報知信号により報知音
を発生させる報知音発生回路と、外部操作により、前記
報知信号の出力を停止させるためのアラーム鳴り止め信
号を出力するアラーム鳴り止めスイッチと、を有するア
ラーム付時計において、前記アラーム鳴り止めスイッチ
が、時計の載置状態を通常と異なる複数の外装面を底面
とする載置状態とすることによりそれぞれオン操作され
る複数の載置状態検出・スイッチで構成し、かつ前記複
数のアラーム鳴り止めスイッチが予め定められた順序で
オン操作されたことを検出した時のみアラー ム鳴り止
め信号を出力する鳴り止め操作記憶回路を設けたことを
特徴とする時計のアラーム鳴り止め回路。(1) A reference signal generator that generates a time reference signal, a time display section that displays the time using the time reference signal, an alarm notification circuit that outputs a notification signal at a preset time, and the alarm notification circuit. an alarm sound generation circuit that generates a notification sound in response to a notification signal from the alarm; and an alarm sound stop switch that outputs an alarm sound stop signal for stopping the output of the notification signal by external operation, The alarm sounding stop switch is constituted by a plurality of mounting state detection/switches each of which is turned on when the watch is mounted in a mounting state with a plurality of exterior surfaces as the bottom surface different from the normal mounting state, and the above-mentioned An alarm sounding stop circuit for a watch, characterized in that it is provided with a sounding stop operation memory circuit that outputs an alarm sounding stop signal only when it detects that a plurality of alarm sounding stops switches are turned on in a predetermined order. .
り止め操作記憶回路は、予め定められた順序と異なった
順序て戴置状態検出スイッチをオン操作した場合に該オ
ン操作を無効とするゲート回路を含むことを特徴とする
時計のアラーム鳴り止め回路。(2) Utility Model Registration Claim Paragraph 1 states that the ring stop operation memory circuit invalidates the on operation when the installation state detection switch is turned on in an order different from the predetermined order. What is claimed is: 1. An alarm stop circuit for a watch, characterized by including a gate circuit for stopping the alarm from ringing.
おいて、報知音発生回路が、鳴り止め操作記憶回路の出
力により報知音の音量を順次低減させる音量低減回路を
含むことを特徴とする時計のアラーム鳴り止め回路。(3) Scope of Utility Model Registration Claims 1 or 2, characterized in that the notification sound generation circuit includes a volume reduction circuit that sequentially reduces the volume of the notification sound by the output of a ring stop operation memory circuit. A clock alarm shut-off circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11584984U JPS6130896U (en) | 1984-07-26 | 1984-07-26 | Clock alarm stop circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11584984U JPS6130896U (en) | 1984-07-26 | 1984-07-26 | Clock alarm stop circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6130896U true JPS6130896U (en) | 1986-02-24 |
| JPS6244390Y2 JPS6244390Y2 (en) | 1987-11-21 |
Family
ID=30674805
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11584984U Granted JPS6130896U (en) | 1984-07-26 | 1984-07-26 | Clock alarm stop circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6130896U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0734396U (en) * | 1993-11-30 | 1995-06-23 | リズム時計工業株式会社 | Alarm Clock |
-
1984
- 1984-07-26 JP JP11584984U patent/JPS6130896U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0734396U (en) * | 1993-11-30 | 1995-06-23 | リズム時計工業株式会社 | Alarm Clock |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6244390Y2 (en) | 1987-11-21 |
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