JPS6133460B2 - - Google Patents

Info

Publication number: JPS6133460B2
Authority: JP; Japan
Prior art keywords: lead wire; connector; holding means; holding; terminal
Prior art date: 1979-12-24
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired

Application number

JP16885379A

Other languages

English (en)

Japanese (ja)

Other versions

JPS5690267A (en

Inventor

Motozo Sakoda

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Panasonic Holdings Corp

Original Assignee

Matsushita Electric Industrial Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1979-12-24

Filing date

1979-12-24

Publication date

1986-08-02

1979-12-24 Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd

1979-12-24 Priority to JP16885379A priority Critical patent/JPS5690267A/ja

1981-07-22 Publication of JPS5690267A publication Critical patent/JPS5690267A/ja

1986-08-02 Publication of JPS6133460B2 publication Critical patent/JPS6133460B2/ja

Status Granted legal-status Critical Current

Links

WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 48
238000007689 inspection Methods 0.000 claims description 8
230000002950 deficient Effects 0.000 description 2
238000001514 detection method Methods 0.000 description 2
238000005476 soldering Methods 0.000 description 2
238000005452 bending Methods 0.000 description 1
210000000078 claw Anatomy 0.000 description 1
238000010586 diagram Methods 0.000 description 1

Landscapes

Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Testing Or Measuring Of Semiconductors Or The Like (AREA)

JP16885379A 1979-12-24 1979-12-24 Inspecting device for condition of connection Granted JPS5690267A (en)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP16885379A JPS5690267A (en)	1979-12-24	1979-12-24	Inspecting device for condition of connection

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP16885379A JPS5690267A (en)	1979-12-24	1979-12-24	Inspecting device for condition of connection

Publications (2)

Publication Number	Publication Date
JPS5690267A JPS5690267A (en)	1981-07-22
JPS6133460B2 true JPS6133460B2 (2)	1986-08-02

Family

ID=15875754

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP16885379A Granted JPS5690267A (en)	1979-12-24	1979-12-24	Inspecting device for condition of connection

Country Status (1)

Country	Link
JP (1)	JPS5690267A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS62120547A (ja) *	1985-11-20	1987-06-01	Fuji Electric Co Ltd	インサ−キツトエミユレ−タ接続方式
JPS6362043A (ja) *	1986-09-02	1988-03-18	Mitsubishi Electric Corp	ｃｐｕ搭載基板の試験方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5686670A (en) *	1996-11-20	1997-11-11	Vlsi Technology, Inc.	Adjustable fixture for use with a wire pull tester

1979
- 1979-12-24 JP JP16885379A patent/JPS5690267A/ja active Granted

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS62120547A (ja) *	1985-11-20	1987-06-01	Fuji Electric Co Ltd	インサ−キツトエミユレ−タ接続方式
JPS6362043A (ja) *	1986-09-02	1988-03-18	Mitsubishi Electric Corp	ｃｐｕ搭載基板の試験方法

Also Published As

Publication number	Publication date
JPS5690267A (en)	1981-07-22

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