JPS613593A - Picture display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is characterized in that when a screen on a screen is vertically divided into a plurality of sections, an electron beam is generated for each section, and an electron beam is generated for each section. The present invention relates to an image display device that displays a television image as a whole by displaying a plurality of lines by vertically deflecting an electron beam.

Conventional configuration and its problems Traditionally, cathode ray tubes have been mainly used as display elements for Kalani television image display, but conventional cathode ray tubes are extremely long and thin compared to the screen size. It was impossible to create a shaped television receiver. In addition, although EL display elements, plasma display devices, liquid crystal display elements, etc. have recently been developed as flat display elements, all of them are insufficient in terms of performance such as brightness, contrast, and color display, and have not been put into practical use. It has not yet been reached.

Therefore, the present applicant proposed a new display device in Japanese Patent Application No. 56-20618 (Japanese Unexamined Patent Publication No. 57-185590) to achieve a flat display device using electron beams.

This method generates an electron beam for each section when the screen is vertically divided into multiple sections, and displays multiple lines by deflecting each electron beam vertically for each section. However, it displays a television image as a whole.

First, a basic configuration example of the image display element used here will be explained with reference to FIG. This display element includes, in order from the back to the front, a back surface Wtti (1), a line i-pole (2) as a beam source, and a vertical focusing electrode (3) <af
, a vertical deflection electrode (4), a beam flow control electrode (5), a horizontal focusing electrode (6), a horizontal deflection electrode (7), a beam acceleration electrode (8), and a screen plate (9). ``These are housed inside the vacuum of a flat glass bulb (not shown). A line cathode (2) serving as a beam source is stretched horizontally so as to generate an electron beam distributed linearly in the horizontal direction.
A plurality of such line shadows N (2) are provided in the vertical direction at appropriate intervals (only four lines (2a) to (2d) are shown in the figure). In Jin's example, it is assumed that 15 are provided. Let them be (2a) to (2o). These wire cathodes (2) are composed of, for example, a 10 to 20 .mu.m tungsten wire coated with an oxide cathode material for thermionic emission. And these line cathodes (
2a) to (20) are heated so as to generate a thermionic electron beam when a current is passed through them, and as will be described later, the electron beam is emitted from the line cathode (2a) to the line for a certain period of time. controlled as follows.

Backside electrode tilii (formerly known as a method of suppressing the generation of electron beams from other line cathodes other than the line cathode that is controlled to emit electron beams for a certain period of time, and directing the generated electron beams only in the forward direction) It has the effect of pushing out.

This back electrode (1) may be formed by a coating of electrically conductive material applied to the inner surface of the rear wall of the glass bulb.

Moreover, a planar electron beam emitting cathode may be used instead of the back electrode (1) and the linear cathode (2).

The vertical focusing electrode (3) is a conductive plate C11 having a long slit in the horizontal direction facing each of the line cathodes (2a) to (2o), and focuses the electron beam emitted from the line cathode (2) onto the vertical focusing electrode (3). It is taken out through slit αQ and focused in the vertical direction. Electron beams for one horizontal line (860 pixels) are taken out at the same time. In the figure, only one section in the horizontal direction is shown. The slit α may be provided with crosspieces at appropriate intervals in the middle,
Alternatively, the through holes may be formed substantially as slits by rows of through holes provided across a large number of side panels at small intervals (intervals such that they almost touch each other) in the horizontal direction. Vertical focusing electrode (3
)′ is also similar.

A plurality of vertical deflection electrodes (4) are arranged horizontally at intermediate positions between the slits (to), and each has a conductor (Ll) on the upper and lower surfaces of the insulating substrate (2).
d. Then, a vertical deflection voltage is applied between the three conductors facing each other to deflect the electron beam in the vertical direction.

In this embodiment, the electron beam from one line cathode (2) is vertically deflected to positions corresponding to 16 lines by a pair of conductors. and 16 vertical deflection electrodes (4)
1 corresponding to each of the 15 line cathodes (2) by
Five pairs of conductors are constructed and ultimately deflect the electron beam to draw 240 horizontal lines on the screen (9).

Next, each of the control electrodes (5) is composed of vertically long slits (on a conductive plate having 141), and a plurality of control electrodes (5) are arranged in parallel in the horizontal direction at predetermined intervals. In this example, 180 control electrode conductive plates (15-1) to
(15-n) are provided (only nine are shown in Figure 1). Each of the control electrodes (5) separates and extracts the electron beam into two picture elements in the horizontal direction, and controls the amount of electron beam passing therethrough in accordance with a video signal for displaying each picture element. Therefore, the conductive plate (15) for the control electrode (5)
-1) If 180 (15-n) lines are provided, 860 pixels can be displayed per horizontal line. In addition, in order to display images in color, each picture element has 8 pixels of R, G, and H.
Display is performed using colored phosphors, and R, G, and B video signals for two picture elements are sequentially applied to each control electrode (5).

In addition, a conductive plate (15-1) for 180 control electrodes (6)
~(15-n) each has 180 pairs for one line (
Two picture elements per set of video signals are applied at the same time, and one line of video is displayed at one time.

The horizontal focusing electrode (6) is a sleeve of the control electrode (5)) 04
It is composed of a conductive plate aη having a plurality of vertically long slits Q (180 slits) facing each other, and focuses the electron beams of each picture element divided horizontally in the horizontal direction. Make it into an electron beam.

The horizontal deflection electrodes (7) are a plurality of conductive plates (7) arranged vertically on both sides of the slit (G).
It consists of 6 electrodes (G)- and 6
A stepwise horizontal deflection voltage is applied to horizontally deflect the electron beam for each pixel, and sequentially irradiate two sets of R, G, and H phosphors on the screen (9) to emit light. Let them do it. In this embodiment, the deflection range is two picture elements wide for each electron beam.

The accelerating electrode (8) is composed of a plurality of conductive plates (2) installed horizontally in the same position as the vertical deflection electrode (4), and it directs the electron beam to the screen (9) with sufficient energy. Accelerate to cause a collision.

The screen (9) has a phosphor that is emitted by electron beam irradiation applied to the back surface of the glass plate (2), and
A metal back layer (not shown) is added. on the phosphor) is one slit α◆ of the control electrode (5)
In other words, for each electron beam divided horizontally, two pairs of eight-color phosphors, R, G, and H, are provided, and they are coated in stripes in the vertical direction. There is. In Fig. 1, the dashed lines drawn on the screen (9) indicate vertical divisions corresponding to the plurality of line cathodes (2), and the two-dot chain lines indicate the divisions in the vertical direction corresponding to the plurality of line cathodes (2). The horizontal divisions displayed corresponding to each of (5) are shown.

As shown in the enlarged view in Figure 2, one section partitioned by these two has R, G, and B phosphors (2) for two pixels in the horizontal direction, and 16 lines in the vertical direction. It has a width of 30 minutes. The size of one section is, for example, IEII in the horizontal direction and 91131 in the vertical direction.

Note that in FIG. 1, the length in the horizontal direction is greatly enlarged relative to the length in the vertical direction for clarity.

In addition, in this embodiment, one control electrode (6), i.e., one
For the electron beam of the book, only one pair of R, G, and H phosphors is provided for two picture elements, but of course, one picture element or eight or more picture elements may be provided. The control electrode (5) has 1 picture element or R for 8 picture elements or more.
, G, and B video signals are applied sequentially, and horizontal deflection is performed in synchronization with them.

Next, the basic configuration and waveforms of each part of a drive circuit for displaying television images on this display element will be explained with reference to FIG. First, a driving portion for irradiating the screen (9) with an electron beam to emit raster light will be described.

The power supply circuit) is a circuit for applying a predetermined bias voltage (operating voltage) to each electrode of the display element.
Illi (1) R-11-Vl, M 7111
Bundle ml m (a) (a5 B: Hv, , V,
A DC voltage of V8 is applied to the horizontal focusing electrode (6), V is applied to the acceleration electrode (8), and V is applied to the screen (9).

Next, the composite video signal of the television signal is added to the input terminal -, and the vertical synchronization signal ■
and the horizontal synchronizing signal H are separated and extracted.

The vertical deflection drive circuit (1) includes a vertical deflection counter (2), a vertical deflection signal storage memory (2), and a digital-to-analog converter tIQ (hereinafter referred to as a DA converter). As input pulses to the vertical deflection drive circuit (to), a vertical synchronizing signal V and a horizontal synchronizing signal H shown in FIG. 4 are used. The vertical deflection counter @ (8 bits) is reset by the vertical synchronizing signal V and counts the horizontal synchronizing signal H. - This vertical deflection counter (2) is counted during the effective scanning period (in this case, 24
0H minute period) is counted, and this count output is supplied to the address of ) in the memory. The vertical deflection signal data (in this case, 10 bits) corresponding to each address is output from the memory), and the 4th
It is converted into vertical deflection signals of v and v' shown in the figure (FIG. 8(b)D). This circuit has memory addresses for storing vertical deflection signals corresponding to each line for 240H, and by storing regular data in the memory every 16H, it is possible to obtain 16 levels of vertical deflection signals. can.

On the other hand, the line cathode drive circuit () uses the vertical synchronization signal V and the output of the vertical deflection counter (2) to generate line cathode drive pulses a~
Create 0. FIG. 5(a) shows the relationship between the vertical synchronizing signal V, the horizontal synchronizing signal H, and the lower 6 bits of the vertical deflection counter. Figure 5(b) shows 1 using each of these signals.
A method of creating line cathode drive pulses a' to 0' every 6H will be shown. In FIG. 5, LSB indicates the lowest bit, (LS
B+1) means the bit one higher than the LSB.

The first line cathode drive pulse a' is generated using the vertical synchronizing signal V and the output (LSB+4) of the vertical deflection counter (c).
The line cathode drive pulses b' to θ' can be created using S flip-flops, etc., and the line cathode drive pulses a' are inverted from the output (LSB+8) of the vertical deflection counter (c) using the register on the shift. This can be obtained by transferring the data as a clock. This drive a'~0' is inverted and made low potential only during each pulse period, and converted into a line cathode drive pulse a~0 at a high potential of about 20 volts during other periods (see Fig. 8). (b) E ) is added to each line cathode (2a) to (2o).

Each line cathode (2a) to (2o) is heated by passing a current during the high potential period of the drive pulses a to 0, and is heated so that electrons can be emitted during the low potential period of the drive pulses a to 0. State is preserved. As a result, 15 wire cathodes (2a)
From ~(2o), low potential drive pulses a~0 are respectively applied.
Electrons are emitted only during the 16H period when . During the period when a high potential is applied, the line cathode ( Since the high potential applied to 2a) to (2o) is positive, no electrons are emitted from the linear cathodes (2a) to (2o). Thus, in the line cathode (2), electrons are sequentially emitted from the upper line cathode (2a) to the lower line cathode (2o) for each 16H period during the effective vertical scanning period. The emitted electrons are pushed forward by the back electrode (1), pass through the opposing slit αQ of the vertical focusing electrode (3), and are focused in the vertical direction.
It becomes a flat electron beam.

Next, line cathode drive pulses a~0 and vertical deflection signals t+,i
The relationship with t' will be explained using FIG. The vertical deflection signals υ, v' change by IH in 16 steps during the 16H period of each line cathode pulse a to 0. The vertical deflection signals V and J both have a center voltage of 4, and are configured to change in opposite directions such that V increases sequentially and I decreases sequentially. These vertical deflection signals V and ♂ are respectively applied to the electrodes (to) of the vertical deflection electrode (4), and as a result, the respective line cathodes (2a) to (
The electron beam generated from 2o) is vertically deflected in 16 steps, and as mentioned earlier, one electron beam draws a raster of 16 lines one line at a time from the top on the screen (9). It is deflected as follows.

As a result of the above, electron beams are emitted for each period of 16H in order from the one above the 15 line cathodes (2a) to (20).
In addition, each electron beam is sequentially deflected by one line from above to below within 15 sections in the vertical direction.
On the screen (9), the electron beam is vertically deflected one line at a time from the first line at the top to the 240th line at the bottom, and a total of 240 lines are drawn.

The vertically deflected electron beam is sent to the control electrode (5).
The image is divided into 180 sections in the horizontal direction by a horizontal focusing electrode (6) and a horizontal focusing electrode (6). Figure 1 shows one of these categories. The amount of this electron beam passing through each section is controlled by a control electrode (5), and is focused horizontally by a horizontal focusing electrode (6) into a single narrow electron beam. The light is deflected in six steps in the direction and sequentially irradiates each of the R, G, and B phosphors (2) for two picture elements on the screen (9). FIG. 2 shows the vertical and horizontal divisions. The phosphors corresponding to each of (15-1) to (15-n) of the control electrode (5) are RlG and B for two picture elements, but for convenience of explanation, one picture element is R, , G, , B1. and the other one is R2s G
2 * B2.

Next, the horizontal deflection drive circuit (b) is composed of a horizontal deflection counter (2) (11 bits), a memory (2) that stores the horizontal deflection signal, and a D-A converter (to). .

As shown in FIG. 7, the input pulses of the horizontal deflection drive circuit (2) are synchronized with the vertical synchronizing signal V and the horizontal synchronizing signal H, and a pulse 6H having a repetition frequency six times that of the horizontal synchronizing signal H is used. The horizontal deflection counter) is reset by the vertical synchronizing signal V and counts the horizontal six times pulse 6H. This horizontal deflection counter) counts 6 times during IH and 240H×6/H=1440 times during 1V, and this count output is supplied to the address of the memory member. The horizontal deflection signal data (here, 8 bits) corresponding to the address is output from the memory member, and is sent to the D-A converter (toward) as shown in FIG. 7 (FIG. 8 (b) C). ' is converted into a horizontal deflection signal such as '. This circuit has memory addresses for storing horizontal deflection signals corresponding to each of 6 x 240 lines, and by storing 6 pieces of regular data for each line in the memory, 6-step horizontal waves are generated during the IH period. A deflection signal can be obtained.

As shown in Fig. 7, this horizontal deflection signal is a pair of horizontal deflection signals ri and h' that change in six steps, both of which have a center voltage of V7, where h decreases sequentially and h' increases sequentially. They change in opposite directions as they move forward. These horizontal deflection signals h' are applied to electrodes (to) and (to) of the horizontal deflection electrode (7), respectively. As a result, each horizontally segmented electron beam is exposed to a screen (9) during each horizontal period.
)'s R, G, B, R, G, B (R,.

It is horizontally deflected so that the phosphors of Gl + B1 + R2z G2 + B2) are sequentially irradiated with V6.

Thus, in each line raster, the horizontal direction 18
The electron beam for each section of 0 is RI r G1 z B
Each phosphor gradient of 1 r R2+ G2 a B2 is sequentially irradiated. ) Then, the electron beam is RI + GI for each horizontal section of each line.
By modulating with the video signal h B1 * R, t G2 + B2, a color television image can be displayed on the screen (9).

Next, the modulation control portion of the electron beam will be explained. First, the composite video signal applied to the television signal input terminal () is applied to the color demodulation circuit (-), where the R-Y
and B-Y color difference signals are demodulated, the G-Y color difference signals are matrix-synthesized, and further, they are combined with the luminance signal Y to generate R, G, and H primary color signals (hereinafter R, G, and B (referred to as a video signal) is output. These R, G, and B video signals are sampled and held by the iso set of sample and hold circuits (81-1) to
(81-n). Each sample and hold circuit (
81-1) to (s knee n) are for R1 and G0, respectively.
It has six sample and hold circuits for B1, R2, G2, and B2. These sample and hold outputs are respectively applied to holding memories (82-1) to (82-n).

On the other hand, the reference clock oscillator) is composed of a PLL (phase-locked loop) circuit, etc., and in this embodiment, the reference clock 6 fs, which is 6 times the color subcarrier fsc, is used.
A reference clock 2fsc which is twice as large as c is generated. The reference clock is controlled to always have a constant phase with respect to the horizontal synchronizing signal H.

The reference clock 2fsc is added to the deflection pulse generation circuit), and a signal 6H, which is six times the horizontal synchronizing signal H, and a signal switching pulse r1 + gl + b! + r2 r
A pulse of R2r b* (FIG. 8(b)B) is obtained. On the other hand, the reference clock 6fsc is added to the sampling pulse generation circuit (b), where the shift register
By delaying the clock by one period, the horizontal period (6
The effective horizontal scanning period (approximately 50 μ
1080 sampling pulses R1 during
1+ R11+ Bll +R12+ G12 + B
121 R211G21 + B! 1 + R22+
G221 B22 ”” Rnl l Gn r 5
Bnl, Rn2 + Gn2 + Rn2 (FIG. 8(b) A) are generated in sequence, and then one transfer pulse t is generated. This sampling pulse R11~Bn
2 corresponds to each picture element when one line of the video to be displayed is divided into 860 picture elements in the horizontal direction, and the position thereof is controlled so as to be always constant with respect to the horizontal synchronizing signal H.

These 1080 sampling pulses R1□ to Bn2 are each connected to 180 sets of sample hold circuits (81-1)
~ (81-n) are added 6 times each, and as a result, each sample hold time @ (sl-1) ~ (81-n) contains 2 pixels each when one line is divided into 180 pieces. RI eGI + B1 r R2+ G2 r
Each video signal of n, is individually sampled and held. The sample held 180 pairs of R'l
e GI r BI x R2e G2 * The video signal of B2 is 180 after completing the sample hold for one line.
The signals are transferred all at once to a set of memories (82-1) to (82-n) by a transfer pulse t, where they are held for the next horizontal period. This retained R1 w G1 * BI
The signal r R2+ G2 +B2 is applied to switching circuits (85-1) to (85-n). Switching circuits (85-1) to (85-n) each have R1+
Gl + BS + R2 + G2 ) B2 is composed of a tri-state or analog gate having individual input terminals and a common output terminal that sequentially switches and outputs them.

The output of each switching circuit (851) to (85-n) is connected to 180 sets of pulse width modulation (PWM) circuits (87-1).
~(87-n), where the sample-held R1. G1゜B1 + R1* G2 r B2
The reference pulse signal is pulse width modulated according to the magnitude of the video signal and output. The repetition period of the reference pulse signal is the above signal switching pulse rl+gl+')1+r2+
g! +b! It is desirable that the pulse width be sufficiently smaller than the pulse width of 1:10 to 1:100, for example.

The output of the pulse width modulation circuits (87-1) to (87-n) is used as a control signal for modulating the electron beam to the 180 conductive plates (1δ-1) of the control electrode (5) of the display element.
~(15-n) are individually added to each. The switching circuits (85-1) to (15-n) are simultaneously controlled by switching pulses '1+g1*bl*r2+g21B2 applied from the switching pulse generating circuit (to). Switching pulse generation circuit (to)
is controlled by the signal switching pulse 'I+g+*bIn''Me gzsb2 from the above-mentioned deflection pulse generation circuit), and each horizontal period is divided into six, and the switching circuits (85-1) to ( 85-n), R1+ Gl + B1 + R2+ G2 + B
The switching signal r1 e 'gt l b+ + 'l! ＋R
2+b2 is generated.

What should be noted here is that the switching circuit (85-1
) to (85-n) R1 m G1 + B1
s R2, G2 y B2 video signal supply switching and electron beam R1+G by horizontal deflection drive circuit (2)
1 * B1 # R2w G2 e The irradiation switching horizontal deflection of B2 to the phosphor is synchronously controlled so that it completely matches both the timing and the order. Thereby, when the electron beam is irradiating the R1 phosphor, the irradiation amount of the electron beam is controlled by the R1 video signal, and G,.

BI * R2w G2 * B2 is controlled in the same way, and each picture element's RI s G1 + Bt * Rs
r Gx t B2 The light emission of each phosphor is R1 of that picture element
+Gl*B1rR2rG2*B2 are respectively controlled by the video signals, and each picture element is displayed by emitting light according to the input video signal. Such control is performed simultaneously for 180 sets (2 pixels each) of one line to display an image of 360 pixels per line, and then sequentially performed for 240 minutes from the upper line to display the screen (9 ), one image will be displayed on top.

The above operations are performed on one input television signal.
This is repeated for each field, and as a result, a moving television image is displayed on the screen (9) in the same way as a normal television receiver.

For example, R, G when using a personal computer,
The pulse width of the B component output is approximately 60ns to 70n.
s, and the pulse interval of the output of the sampling pulse generator shown in Fig. 8 is approximately 1401 s. Therefore, when a small pulse of 140 ns or less as shown above is input, the phase relationship changes. On the other hand, sampling may not be performed and information may be missing.

OBJECT OF THE INVENTION The present invention aims to eliminate missing information in response to a pulse input having a pulse width smaller than the sampling pulse period. The object of the present invention is to provide an image display device that can reproduce this input.

Structure of the Invention The present invention generates a pulse having a width equal to or longer than the period of the signal sampling pulse in synchronization with the R, G, and B component signals of a personal computer, etc., and combines this pulse with the original R, G, and B component signals. This device is equipped with a pulse conversion circuit that outputs the logical sum of R, G:B component signals as a new R, G:B component signal.Even if a pulse with a width smaller than the signal sampling pulse width is input, it can be reliably sampled and the information It is possible to ensure that there are no omissions.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 8th
The figure shows its configuration. Between the color demodulation circuit (to) and the sample hold circuit (b), the output RIG of the color demodulation circuit
A switch member and a pulse converter circuit for switching between R, G, and B component signals of a personal computer, etc. are installed. This pulse conversion circuit receives the switch control output as well as the R, G, and B signals of the personal computer.
Discrimination signal C whether it is a component signal or a normal video signal
P is input.

The converted signal is sent to the sample and hold circuit (2) as before.
is applied to

FIG. 9 shows an example of a specific circuit of the pulse conversion circuit (2). The pulse input via the input terminal is 5N74L512
1 monostable multi-by-break generates a pulse having a pulse width of about 150 ns from the rising edge of the input signal pulse. This pulse and the original input signal pulse are logically summed by a gate wheel, a pulse with a large width is output, and it is switched by two series of analog gates using, for example, 4066 -a@, and an output of 1m is made. . This analog gate 11- is switched by applying a discrimination signal CP pulse which becomes H when a pulse is input from a personal computer or the like and becomes L when there is no error.

FIG. 10 specifically shows the pulse relationship. Figure 10(a)
is the sampling clock, and samples are taken at the rising edge of the pulse. For example, when using a personal computer, the input signal Pc) in FIG. 10(b) falls completely within the sampling period, resulting in an information defect and cannot be reproduced as an image ()t+).

However, by passing through the pulse conversion circuit, as shown in FIG.
Since the input signal is obtained at the output end of υ, the presence of the input signal at the sampling position indicated by the arrow ω causes the temporal position to shift slightly, but there is no lack of information. Also, the 10th
When a wide pulse PC8 without any problems is input as shown in FIG. 10(d), the same waveform as the conventional one is obtained at the output end of the analog gate @Q, such as the Pc;FB force in FIG. 10 ω. In this way 1. The pulse width is changed when the input pulse width is 150 ns or less. Further, this 150 ns is arbitrarily determined by the constant of CR added to the monostable multivibrator.

Furthermore, when a normal video signal is input, the analog gate υ closes and the analog gate 12 opens, and the input video signal is Output from the street output terminal -,
Applied to sample and hold circuit 0Ill.

Even if a pulse as small as 60 ns is applied to an input signal like this, the information will not be lost and will be reproduced on the screen, making it possible to obtain more accurate information.

[Brief explanation of drawings]

Figure 1 is a structural diagram of the image display device, Figure 2 is a diagram showing the minimum picture element on the screen, Figure 8 is a block diagram of the drive circuit and waveform diagrams of each part, and Figure 4 is synchronized with the vertical deflection signal. Figure 5 is a timing chart of the counter, Figure 6 is a diagram showing the relationship between drive output pulses, Figure 7 is a diagram showing the relationship between horizontal deflection signals and synchronization signals, and Figure 8 is an example of the present invention. FIG. 9 is a specific circuit diagram of the present invention, and FIG. 10 is a timing diagram for explaining the present invention. (1)... Back electrode, (2) (2a) to (2o).
... line cathode, (3> (3S... vertical focusing IEaK,
(4) Vertical deflection electrode, (5) Beam flow control electrode, (7> Horizontal deflection electrode, (9) Screen plate, ) Slit, (E) ...phosphor, (
c)...Synchronization separation circuit, (2)...Vertical deflection counter, (2)...Line cathode drive circuit, (2)...Memory, (2)...Horizontal deflection counter, (2)... )...Memory, (2)...Color demodulation circuit, (81-1) to (81-n)
...sample hold circuit, (82-1) to (82-
n)...Memory, (to)...Reference clock oscillator, -1...Sampling pulse generation circuit, (85-1
) to (85-n)...switching circuit, (to)...
・Switching pulse generation circuit, (8'l-1) ~ (8
7-n) ...-PWM circuit, @ (to) ... converter to straw, (conversion) ... vertical deflection drive circuit, 0η ... horizontal deflection drive circuit, to) ... pulse for deflection Generation circuit, (b)
...Pulse conversion circuit

Claims (1)

[Claims] 1. A screen coated with a phosphor that emits light when irradiated with an electron beam; an electron beam source that generates an electron beam for each vertical section of the screen divided into a plurality of vertical sections; a horizontal separating means for separating the electron beam generated by the electron beam source into each of the plurality of horizontal divisions of the screen on the screen and irradiating the electron beam onto the screen; A polarizing electrode that deflects the electron beams in multiple steps vertically and horizontally between A personal computer that has a beam flow control electrode that controls the amount of light emitted, a focusing electrode that controls the size of light emitted by the electron beam on the phosphor surface in each pixel, and a back electrode that controls the amount of generated electron beam. A pulse with a width greater than the period of the signal sampling pulse is generated in synchronization with the R, G, B component signals such as, and the OR of this pulse and the original R, G, B component signals is New R,
An image display device equipped with a pulse conversion circuit that outputs G and B component signals.