JPS6149570A - Power supply device for display device - Google Patents

Power supply device for display device

Info

Publication number
JPS6149570A
JPS6149570A JP59172012A JP17201284A JPS6149570A JP S6149570 A JPS6149570 A JP S6149570A JP 59172012 A JP59172012 A JP 59172012A JP 17201284 A JP17201284 A JP 17201284A JP S6149570 A JPS6149570 A JP S6149570A
Authority
JP
Japan
Prior art keywords
circuit
timer
switch
power
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59172012A
Other languages
Japanese (ja)
Inventor
Hirotsune Taguchi
田口 博識
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59172012A priority Critical patent/JPS6149570A/en
Publication of JPS6149570A publication Critical patent/JPS6149570A/en
Pending legal-status Critical Current

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  • Television Receiver Circuits (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)

Abstract

PURPOSE:To avoid superposing a rush current and make it possible that power is turned on again immediately after power switch is opened, by flowing the rush current to a degaussing circuit when the rush current to a capacitor disappears and using a fixed resistance to disconnect the degaussing circuit after a prescribed time. CONSTITUTION:When power is turned on by closing of a power switch 2, a timer 16 is started and is operated after t1-number of seconds to close a switch 13. When this switch 13 is closed, the charging current to a capacitor 6 is charged through a ripple suppressing resistance 12 having a small resistance value, and therefore, a rush current suppressing resistance 11 is not overheated unnecessarily. A timer 17 is operated simultaneously with coming of the output of the timer 16 to close a switch 14, and a degaussing circuit 9 is operated. Thus, the rush current for power-on is flowed to the circuit 9 when the rush current to the capacitor 6 disappears, and the rush current is not superposed to that to the capacitor 6. Since a resistance circuit 10 is the fixed resistance, the stable rush current suppressing operation is secured even if the switch 2 is opened in the state, where the circuit is warmed up sufficiently after power on, and is closed again immediately.

Description

【発明の詳細な説明】 [発明の技術分野] この発明は、CRT(陰極線管)モニタあるいはテレビ
ジョンなどのディスプレイ装置に用いられる電源装置、
特に電源投入時の突入電流を抑制するディスプレイ装置
用電源装置に関するものである。
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a power supply device used in a display device such as a CRT (cathode ray tube) monitor or television;
In particular, the present invention relates to a power supply device for a display device that suppresses inrush current when the power is turned on.

[従来技術] 第1図は従来のこの種電源装置を示す回路図であり、図
において(1)は交流電源、(2)は電源スィッチ、(
3)はこの電源スィッチを介して上記交流電源(1)に
接続される電源回路であり、上記交流電源(1)を全波
整流する整流回路(4)、突入電流抑制用の負特性サー
ミスタ(5)、電源安定化コンデンサ(6)及び電源ト
ランス(7)により構成されている。
[Prior Art] Fig. 1 is a circuit diagram showing a conventional power supply device of this kind, in which (1) is an AC power supply, (2) is a power switch, (
3) is a power supply circuit connected to the AC power supply (1) through this power switch, which includes a rectifier circuit (4) for full-wave rectification of the AC power supply (1), and a negative characteristic thermistor (3) for suppressing inrush current. 5), a power supply stabilizing capacitor (6), and a power transformer (7).

(8)はこの電源回路(3)の出力端子であり、図示し
ないディスプレイ装置に接続され、これを駆動する。(
9)は上記ディスプレイ装置の帯磁を除去するための消
磁コイル、正特性サーミスタ等からなる消磁回路であり
、上記電源スィッチ(2)を介して交流電源(1)に接
続される。なおこの消磁回路(9)は、例えば特開昭5
9−16486号公報に示される如く周知の回路である
から、ここではその詳細説明は省略する。
(8) is an output terminal of this power supply circuit (3), which is connected to and drives a display device (not shown). (
Reference numeral 9) is a demagnetizing circuit consisting of a demagnetizing coil, a positive temperature coefficient thermistor, etc. for removing magnetization of the display device, and is connected to the AC power source (1) via the power switch (2). Note that this degaussing circuit (9) is, for example,
Since it is a well-known circuit as shown in Japanese Patent No. 9-16486, detailed explanation thereof will be omitted here.

第1図の動作について説明する。電源スィッチ(2)の
開成による電源投入時の突入電流の大きさは、主として
消磁回路(9)と負特性サーミスタ(5)の抵抗値によ
ってその値が決まる。いま負特性サーミスタ(5)を温
度特性をもたない固定抵抗R1に置き換えて考えると、
R1の抵抗値は下限値RLより大きく、上限値RHより
小さくする必要がある。
The operation shown in FIG. 1 will be explained. The magnitude of the rush current when the power is turned on by opening the power switch (2) is determined mainly by the resistance values of the degaussing circuit (9) and the negative characteristic thermistor (5). Now, if we replace the negative characteristic thermistor (5) with a fixed resistor R1 that has no temperature characteristics, we get
The resistance value of R1 needs to be greater than the lower limit value RL and smaller than the upper limit value RH.

何故なら、R1の抵抗値が下限値RLより小さくなると
、回路のリップル電流が大きくなりすぎて、リップル電
流の規格を満足できなくなるからであり、一方上限値R
Hより大きくなると、電源電圧の立ち上がりが遅くなり
すぎて1回路が正常に動作しなくなるからである。理想
的にはR1の抵抗値は、電源投入時は上限値RHを超え
ない範囲でなるべく大きく、一方電源安定後は下限値R
Lを下まわらない範囲でなるべく小さいことが望ましい
。つまり抵抗値R1を上限値RHから下限値RLまで変
化できることが最も望ましいといえる。この要求から負
特性サーミスタ(5)が用いられるのである。即ち、室
温時(電源投入時)の抵抗値がRHであり、電源投入後
自己発熱で抵抗値を減じ、電源安定後の抵抗値がR1と
なるような負特性サーミスタ(5)を選べば、目的を達
し得るのである。
This is because if the resistance value of R1 becomes smaller than the lower limit value RL, the ripple current of the circuit becomes too large and the ripple current specification cannot be satisfied.
This is because if it becomes larger than H, the rise of the power supply voltage will be too slow and one circuit will not operate properly. Ideally, the resistance value of R1 should be as large as possible without exceeding the upper limit value RH when the power is turned on, and on the other hand, after the power supply stabilizes, the resistance value of R1 should be as large as possible without exceeding the upper limit value RH.
It is desirable that it be as small as possible within a range not less than L. In other words, it is most desirable to be able to change the resistance value R1 from the upper limit value RH to the lower limit value RL. Because of this requirement, a negative characteristic thermistor (5) is used. In other words, if you choose a negative characteristic thermistor (5) whose resistance value at room temperature (when the power is turned on) is RH, whose resistance value is reduced by self-heating after the power is turned on, and whose resistance value after the power supply is stabilized is R1, You can achieve your purpose.

しかしこの従来装置では、次のような不都合がある。即
ち負特性サーミスタ(5)を突入電流抑制用抵抗として
いるため、電源を切った場合に負特性サーミスタ(5)
が室温に戻るまでは抵抗値が小さく、突入電流抑制機能
を発揮できない。換言すれば、電源を切った場合、負特
性サーミスタ(5)が室温に戻るまで数十分を要するか
ら、その間は突入電流を十分に抑制できないこととなり
、電源切断後即座に電源を再投入できないという不都合
があった。
However, this conventional device has the following disadvantages. In other words, since the negative characteristic thermistor (5) is used as a resistance for suppressing inrush current, when the power is turned off, the negative characteristic thermistor (5)
Until the temperature returns to room temperature, the resistance value is small and the inrush current suppression function cannot be achieved. In other words, when the power is turned off, it takes several tens of minutes for the negative characteristic thermistor (5) to return to room temperature, and during that time, the inrush current cannot be sufficiently suppressed, and the power cannot be turned on again immediately after the power is turned off. There was this inconvenience.

[発明の概要] この発明は上記のような不都合を解消するためになされ
たもので、電源投入時に起動され所定時間後に作動する
タイマ回路を設け、このタイマ回路の作動により突入電
流抑制用固定抵抗の抵抗値を減することにより、電源切
断後即座に再投入しても十分突入電源を抑制できるもの
とし、さらに消磁回路を上記タイマ回路の作動時に電源
に接続する即ち消磁回路の動作時点を電源投入時点から
ずらせることにより、一層突入電流を抑制しようとする
ものである。
[Summary of the Invention] This invention has been made to solve the above-mentioned inconveniences, and includes a timer circuit that is activated when the power is turned on and operates after a predetermined period of time. By reducing the resistance value of the circuit, the inrush power can be sufficiently suppressed even if the power is turned on again immediately after being turned off.In addition, the degaussing circuit is connected to the power supply when the above-mentioned timer circuit is activated. This is intended to further suppress the inrush current by shifting it from the time of turning on.

[発明の実施例コ 第2図はこの発明の一実施例を示す回路図であり、(1
0)は高抵抗値の突入電流抑制抵抗(1])と低抵抗値
のリップル抑制抵抗(+−2)との並列回路からなる抵
抗回路、(13)は上記リップル抑制抵抗(12)を挿
脱するためのスイッチ、(]4)は消磁回路(9)の入
力端に設けられたスイッチ、(j5)は電源投入時に起
動され、所定時間後に作動する第1のタイマ(16)と
、この第1のタイマの出力の到来と同時に作動し、所定
時間後に復帰する第2のタイマ(17)とにより構成さ
れるタイマ回路であり、上記第1のタイマ(16)の出
力によりスイッチ(13)を駆動して抵抗(12)を回
路に挿入し、第2のタイマ(17)の出力によりスイッ
チ(14)を駆動して消磁回路(9)を交流電源(1)
に接続する。(18)は消磁起動スイッチであり、これ
を閉成することにより任意時に第2のタイマ(17)を
介してスイッチ(14)を閉成し、消磁「路(9)を動
作させる。
[Embodiment of the Invention FIG. 2 is a circuit diagram showing an embodiment of the invention.
0) is a resistance circuit consisting of a parallel circuit of a high-resistance inrush current suppression resistor (1]) and a low-resistance ripple suppression resistor (+-2), and (13) is a resistance circuit in which the ripple suppression resistor (12) is inserted. A switch for degaussing, (4) is a switch provided at the input end of the degaussing circuit (9), (j5) is a first timer (16) that is activated when the power is turned on and operates after a predetermined time; This is a timer circuit consisting of a second timer (17) that operates simultaneously with the arrival of the output of the first timer and returns after a predetermined time, and the output of the first timer (16) activates the switch (13). The resistor (12) is inserted into the circuit, and the output of the second timer (17) drives the switch (14) to connect the degaussing circuit (9) to the AC power source (1).
Connect to. (18) is a degaussing start switch, and by closing this, the switch (14) is closed at any time via the second timer (17), and the degaussing path (9) is operated.

第2図の動作について説明する。電源スィッチ(2)の
開成による電源投入時、スイッチ(13) (14)は
何れも開放している。電源投入と同時に第1のタイマ(
16)が起動し、t1秒経過後に動作してスイッチ(1
3)を閉成する。電源投入後スイッチ(13)が閉成す
るまでは、コンデンサ(6)は十分大きな値の突入電流
抑制抵抗(11)を通してのみ充電されるから、電源投
入時の突入電流は小さな値となる。t1秒経過してスイ
ッチ(13)が閉成すれば、コンデンサ(6)への充電
電流は抵抗値の小さいリップル抑制抵抗(12)を通し
て充電されることになり、突入電流抑制抵抗(11)が
無用に過熱されることがない。
The operation shown in FIG. 2 will be explained. When the power is turned on by opening the power switch (2), the switches (13) and (14) are both open. The first timer (
16) starts and operates after t1 seconds and switches (1
3) Close. Since the capacitor (6) is charged only through the inrush current suppressing resistor (11) having a sufficiently large value until the switch (13) is closed after the power is turned on, the inrush current when the power is turned on is a small value. If the switch (13) is closed after t1 seconds have elapsed, the charging current to the capacitor (6) will be charged through the ripple suppression resistor (12) with a small resistance value, and the inrush current suppression resistor (11) will be charged. No unnecessary overheating.

第2のタイマ(17)は第1のタイマ(16)の出力の
到来と同時に、つまり電源投入後t1秒後に動作してス
イッチ(14)を閉成し、消磁回路(9)を動作させる
。以上の動作により、電源投入時の突入電流は抵抗(1
1)により最小値に抑制され、また消磁回路(9)の動
作時点を電源投入時点よりもし1秒遅らせることにより
、コンデンサ(6)への突入電流がなくなった時点で消
磁回路(9)へ突入電流が流れることになるので、電源
回路(3)と消磁回路(9)との突入電流が重畳されず
、一層電源投入時の突入電流を小さく抑えることができ
る。また抵抗回路(lO)が固定抵抗であるため、電源
投入後回路が十分暖まった状態において電源スィッチ(
2)を開放し即座に再投入しても、安定した突入電流抑
制動作が保証される。
The second timer (17) operates simultaneously with the arrival of the output of the first timer (16), that is, t1 seconds after the power is turned on, to close the switch (14) and operate the degaussing circuit (9). Due to the above operation, the inrush current when the power is turned on is reduced by the resistance (1
1), and by delaying the operation time of the degaussing circuit (9) by 1 second from the time of power-on, the inrush current to the capacitor (6) is suppressed to the minimum value. Since the current flows, the rush currents of the power supply circuit (3) and the degaussing circuit (9) are not superimposed, and the rush current when the power is turned on can be further suppressed. In addition, since the resistance circuit (lO) is a fixed resistance, the power switch (
2) Stable inrush current suppression operation is guaranteed even if it is opened and then immediately re-closed.

ところで第2のタイマ(17)は消磁回路(9)による
消磁時間し2秒が経過すると復帰し、スイッチ(14)
を開放して消磁回路(9)を回路から切離すが、二九に
より消磁回路(9)番こよる無用の6電力消費をなくす
と共に、消磁回路(9)に用いられる正特性サーミスタ
の寿命を長くすることができる。さらに消磁回路(9)
を回路から切離すことにより消磁回路(9)中の正特性
サーミスタを常に室温に戻しておくことができるので、
電源スィッチ(2)の開放後即座に再投入しても完全な
消磁が行なえるうえ、電源投入状態のまま消磁起動スイ
ッチ(I8)を閉成することにより第2のタイマ(17
)を介して任意時に消磁を行なうことができる。
By the way, the second timer (17) is reset when 2 seconds have elapsed due to the degaussing time by the degaussing circuit (9), and the switch (14) is activated.
The degaussing circuit (9) is disconnected from the circuit by opening the circuit, but this also eliminates unnecessary power consumption caused by the degaussing circuit (9) and extends the life of the positive temperature coefficient thermistor used in the degaussing circuit (9). It can be made longer. Furthermore, the degaussing circuit (9)
By disconnecting the degaussing circuit (9) from the circuit, the positive temperature coefficient thermistor in the degaussing circuit (9) can be kept at room temperature.
Complete degaussing can be performed even if the power switch (2) is turned on again immediately after being opened, and the second timer (17
) demagnetization can be performed at any time.

上記実施例では第1のタイマ(1G)と第2のタイマ(
17)の動作時点を同じにしたが、第2のタイマ(17
)の動作時点を第1のタイマ(16)のそれより遅らせ
ることにより、消磁回路(9)の投入時点と抵抗回路(
10)の切換時点をずらせ、さらに消磁回路(9)の投
入時における突入電流を小さくすることができる。第2
のタイマ(17)の動作を第1のタイマ(16)より遅
らせるには次の2つの手段が考えられる。一つは第2の
タイマ(17)も第1のタイマ(16)と同様電源投入
時に起動されるものとし、その動作時間を第1のタイマ
(I6)よりも長く設定する。他の一つは第2のタイマ
(17)を第1のタイマ(16)の出力により起動し、
所定時間後に動作するものとする。また上記実施例では
抵抗回路(10)を高抵抗との並列回路で構成し、低抵
抗をスイッチ(13)により挿脱するものとしたが、高
抵抗と低抵抗との直列回路で構成し、高抵抗と並列にス
イッチ(13)を接続して高抵抗を挿脱するものとして
も同様の効果を期待できる。
In the above embodiment, the first timer (1G) and the second timer (
17) were made the same, but the second timer (17)
) by delaying the operating point of the first timer (16), the turning point of the degaussing circuit (9) and the resistor circuit (
By shifting the switching point in step 10), it is possible to further reduce the rush current when the degaussing circuit (9) is turned on. Second
The following two methods can be considered to make the operation of the timer (17) later than the first timer (16). One is that the second timer (17) is also started when the power is turned on, like the first timer (16), and its operating time is set longer than that of the first timer (I6). The other one starts the second timer (17) by the output of the first timer (16),
It is assumed that the operation starts after a predetermined time. Further, in the above embodiment, the resistance circuit (10) is configured as a parallel circuit with a high resistance, and the low resistance is inserted/removed by the switch (13), but it is configured as a series circuit with a high resistance and a low resistance. A similar effect can be expected by connecting a switch (13) in parallel with the high resistance to insert and remove the high resistance.

[発明の効果] 上記のようにこの発明によれば、電源投入時に起動され
所定時間後に作動するタイマ回路の出力により固定抵抗
の抵抗値を減すると共に消磁回路を投入するものとした
から、安定した突入電流抑制動作が可能となり、また固
定抵抗を用いたことと消磁回路を所定時間後に回路から
切離すものとしたから、・電源開放後即座に電源を再投
入するこが可能となる。
[Effects of the Invention] As described above, according to the present invention, the resistance value of the fixed resistor is reduced by the output of the timer circuit that is activated when the power is turned on and operates after a predetermined period of time, and the degaussing circuit is also turned on. Inrush current suppression operation is possible, and since a fixed resistor is used and the degaussing circuit is disconnected from the circuit after a predetermined time, it is possible to immediately turn on the power again after turning off the power.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来装置を示す回路図、第2図はこの発明の一
実施例を示す回路図であり、図において(1)は交流電
源、(2)は電源スィッチ、(3)は電源回路、(4)
は整流回路、(6)は電源安定化コンデンサ、(7)は
電源トランスで、(8)はその出力端子、(9)は消磁
回路、 (10)は高抵抗(11)、低抵抗(12)か
らなる抵抗回路、(13) (14)はスイッチ、 (
15)はタイマ回路、(1G)は第1のタイマ、(I7
)は第2のタイマ、(18)は消磁起動スイッチである
。 なお、各図中同一符号は同一または相当部分を示すもの
とする。
FIG. 1 is a circuit diagram showing a conventional device, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. In the figure, (1) is an AC power supply, (2) is a power switch, and (3) is a power supply circuit. ,(4)
is a rectifier circuit, (6) is a power supply stabilization capacitor, (7) is a power transformer, (8) is its output terminal, (9) is a degaussing circuit, (10) is a high resistance (11), a low resistance (12) ), (13) and (14) are switches, (
15) is a timer circuit, (1G) is the first timer, (I7
) is a second timer, and (18) is a degaussing start switch. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (7)

【特許請求の範囲】[Claims] (1)交流電源に接続される、整流回路、抵抗回路及び
電源安定化コンデンサからなる電源回路と、この電源回
路の出力により駆動されるディスプレイ装置の帯磁を除
去する消磁回路とを有したディスプレイ装置用電源装置
において、上記電源回路が上記交流電源に接続されたと
き起動され、所定時間後に作動するタイマ回路、このタ
イマ回路の出力により駆動される第1及び第2のスイッ
チを備え、上記第1のスイッチの駆動により上記抵抗回
路の抵抗値を減じ、上記第2のスイッチの駆動により上
記消磁回路を上記交流電源に接続するようにしたことを
特徴とするディスプレイ装置用電源装置。
(1) A display device having a power supply circuit connected to an AC power source and consisting of a rectifier circuit, a resistance circuit, and a power supply stabilizing capacitor, and a degaussing circuit that removes magnetization from a display device driven by the output of this power supply circuit. a timer circuit that is activated when the power supply circuit is connected to the AC power source and operates after a predetermined time; first and second switches driven by the output of the timer circuit; A power supply device for a display device, characterized in that the resistance value of the resistance circuit is reduced by driving the switch, and the degaussing circuit is connected to the AC power source by driving the second switch.
(2)抵抗回路が高抵抗と低抵抗との並列回路からなり
、第1のスイッチにより低抵抗を挿脱するようにしたこ
とを特徴とする特許請求の範囲第1項記載のディスプレ
イ装置用電源装置。
(2) The power supply for a display device according to claim 1, wherein the resistance circuit is made up of a parallel circuit of a high resistance and a low resistance, and the low resistance is inserted and removed by a first switch. Device.
(3)抵抗回路が高抵抗と低抵抗との直列回路からなり
、第1のスイッチにより高抵抗を挿脱するようにしたこ
とを特徴とする特許請求の範囲第1項記載のディスプレ
イ装置用電源装置。
(3) The power supply for a display device according to claim 1, wherein the resistance circuit is composed of a series circuit of a high resistance and a low resistance, and the high resistance is inserted and removed by a first switch. Device.
(4)タイマ回路を、第1のタイマと、この第1のタイ
マよりも遅れて作動する第2のタイマとにより構成し、
第1のタイマにより第1のスイッチを、第2のタイマに
より第2のスイッチをそれぞれ駆動するようにしたこと
を特徴とする特許請求の範囲第1項記載のディスプレイ
装置用電源装置。
(4) The timer circuit is composed of a first timer and a second timer that operates later than the first timer,
2. The power supply device for a display device according to claim 1, wherein the first timer drives the first switch, and the second timer drives the second switch.
(5)第2のタイマを第1のタイマの出力により起動す
るようにしたことを特徴とする特許請求の範囲第4項記
載のディスプレイ装置用電源装置。
(5) The power supply device for a display device according to claim 4, wherein the second timer is activated by the output of the first timer.
(6)第2のタイマを作動後所定時間の後復帰させるよ
うにしたことを特徴とする特許請求の範囲第4項または
第5項記載のディスプレイ装置用電源装置。
(6) A power supply device for a display device according to claim 4 or 5, characterized in that the second timer is reset after a predetermined period of time after activation.
(7)第2のタイマを復帰後任意時に再作動できるよう
にしたことを特徴とする特許請求の範囲第6項記載のデ
ィスプレイ装置用電源装置。
(7) The power supply device for a display device according to claim 6, characterized in that the second timer can be restarted at any time after recovery.
JP59172012A 1984-08-17 1984-08-17 Power supply device for display device Pending JPS6149570A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59172012A JPS6149570A (en) 1984-08-17 1984-08-17 Power supply device for display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59172012A JPS6149570A (en) 1984-08-17 1984-08-17 Power supply device for display device

Publications (1)

Publication Number Publication Date
JPS6149570A true JPS6149570A (en) 1986-03-11

Family

ID=15933890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59172012A Pending JPS6149570A (en) 1984-08-17 1984-08-17 Power supply device for display device

Country Status (1)

Country Link
JP (1) JPS6149570A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63172587A (en) * 1986-12-08 1988-07-16 アールシーエー トムソン ライセンシング コーポレイシヨン Degaussing circuit
JP2007108984A (en) * 2005-10-13 2007-04-26 Matsushita Electric Ind Co Ltd Power supply stabilization circuit for heating element storage box cooling device
US8049373B2 (en) 2006-12-05 2011-11-01 Panasonic Corporation Apparatus for stabilizing power supply of heater housing box cooling apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63172587A (en) * 1986-12-08 1988-07-16 アールシーエー トムソン ライセンシング コーポレイシヨン Degaussing circuit
JP2007108984A (en) * 2005-10-13 2007-04-26 Matsushita Electric Ind Co Ltd Power supply stabilization circuit for heating element storage box cooling device
US8049373B2 (en) 2006-12-05 2011-11-01 Panasonic Corporation Apparatus for stabilizing power supply of heater housing box cooling apparatus
EP2085854A4 (en) * 2006-12-05 2012-09-05 Panasonic Corp Apparatus for stabilizing power supply of heater housing box cooling apparatus

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