JPS6157773U - - Google Patents
Info
- Publication number
- JPS6157773U JPS6157773U JP14303584U JP14303584U JPS6157773U JP S6157773 U JPS6157773 U JP S6157773U JP 14303584 U JP14303584 U JP 14303584U JP 14303584 U JP14303584 U JP 14303584U JP S6157773 U JPS6157773 U JP S6157773U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- frequency
- motor
- outputs
- tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 2
- 230000010363 phase shift Effects 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Description
図面はこの考案のビデオテープレコーダの１実
施例のブロツク図である。
１…主位相エラー信号形成部、２…切換スイツ
チ、３…加算回路、４…キヤプスタンモータ駆動
回路、５…キヤプスタンモータ、６…周波数−電
圧変換器、７…分周回路、８…位相比較回路、９
…キヤプスタン制御部。
The drawing is a block diagram of one embodiment of the video tape recorder of this invention. DESCRIPTION OF SYMBOLS 1... Main phase error signal formation part, 2... Selector switch, 3... Adder circuit, 4... Capstan motor drive circuit, 5... Capstan motor, 6... Frequency-voltage converter, 7... Frequency dividing circuit, 8 ...Phase comparator circuit, 9
...Capstan control section.
Claims (1)
て各トラツクに順次くり返し記録されたテープと
、該テープの再生パイロツト信号にもとづきトラ
ツキング位相ずれに比例した主位相エラー信号を
形成して出力する主位相エラー信号形成部と、テ
ープの標準再生時にキヤプスタンモータの回転検
出信号にもとづく速度エラー信号と前記主位相エ
ラー信号とを加算して前記モータのサーボ制御信
号を形成し、該サーボ制御信号により前記モータ
をサーボ制御するキヤプスタン制御部とを備える
とともに、前記標準再生時と異なる速度でテープ
が走行するピクチヤサーチなどの複数の特殊再生
機能を有するビデオテープレコーダにおいて、前
記キヤプスタン制御部に、前記標準再生時に前記
主位相エラー信号を出力し、前記各特殊再生機能
にもとづくテープの特殊再生時に副位相エー信号
を出力する切換スイツチと、該スイツチから出力
された前記主、副位相エラー信号それぞれと前記
速度エラー信号とを加算し前記標準再生時および
前記特殊再生時に前記モータのサーボ制御信号を
形成して出力する加算回路と、該加算回路のサー
ボ制御信号により前記モータをサーボ制御するキ
ヤプスタンモータ駆動回路と、前記特殊再生時に
再生モードに対応した分周比設定信号が入力され
、該設定信号にもとづき分周比が可変設定される
とともに設定された分周比により前記回転検出信
号を分周し、前記特殊再生時に一定周波数の分周
信号を出力する分周回路と、前記分周信号と同一
周波数の位相基準信号と前記分周信号とを位相比
較し、前記副位相エラー信号を形成して前記切換
スイツチに出力する位相比較回路とを設けたビデ
オテープレコーダ。 A main phase error signal that forms and outputs a main phase error signal proportional to the tracking phase shift based on a tape in which a 4-frequency pilot signal is recorded repeatedly on each track in combination with a video signal, and a reproduced pilot signal of the tape. A signal forming section adds a speed error signal based on a rotation detection signal of the capstan motor and the main phase error signal during standard playback of a tape to form a servo control signal for the motor, and the servo control signal generates a servo control signal for the motor. In the video tape recorder, the video tape recorder includes a capstan control unit that servo-controls a motor, and has a plurality of special playback functions such as a picture search in which the tape runs at a speed different from that during standard playback. a changeover switch that outputs the main phase error signal and outputs a sub-phase A signal during special playback of a tape based on each of the special playback functions; and the main and sub-phase error signals output from the switch and the speed error; an adder circuit that adds the signals to form and output a servo control signal for the motor during the standard playback and the special playback, and a capstan motor drive circuit that servo-controls the motor using the servo control signal of the adder circuit. and a frequency division ratio setting signal corresponding to the reproduction mode is input during the special reproduction, and the frequency division ratio is variably set based on the setting signal, and the frequency of the rotation detection signal is divided by the set frequency division ratio, a frequency dividing circuit that outputs a frequency-divided signal of a constant frequency during the special reproduction, and a phase comparison between the frequency-divided signal and a phase reference signal having the same frequency as the frequency-divided signal to form the sub-phase error signal; A video tape recorder equipped with a phase comparator circuit that outputs to a changeover switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14303584U JPS6157773U (en) | 1984-09-20 | 1984-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14303584U JPS6157773U (en) | 1984-09-20 | 1984-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6157773U true JPS6157773U (en) | 1986-04-18 |
Family
ID=30701348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14303584U Pending JPS6157773U (en) | 1984-09-20 | 1984-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6157773U (en) |
-
1984
- 1984-09-20 JP JP14303584U patent/JPS6157773U/ja active Pending
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