JPS6160987B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an ignition device for an internal combustion engine that controls ignition timing using an electronic circuit.

The so-called electronic advance ignition system, which controls ignition timing using an electronic circuit, has many advantages over the conventional centrifugal and vacuum mechanical automatic advance systems, so there are many different types of ignition systems available. Proposed. In other words, this electronic advance type ignition system not only improves engine output and drivability, but also reduces harmful exhaust gas, improves starting performance, and prevents erroneous adjustments by general users. This is superior to the formula, and enables highly accurate advance angle control.

As one of such electronic advance angle systems, there is a conventional one in which advance angle control is performed by comparing integrated voltages of two integrating circuits using a comparator. That is, there is a pulse generator that generates a set pulse and a reset pulse at a predetermined crank angle, a first integrator that starts integration when one of the two pulses is activated, and a first integrator that starts integration when the other pulse is activated and then integrates when the one pulse is activated. a second integrator that stops;
It is equipped with a comparator that compares the charging voltages of these integrators, and ignition is performed when the charging voltages of both integrators match (for example, Japanese Patent Application Laid-Open No. 1983-1999).
5406, "Internal Combustion Engine", Vol. 19, No. 234, p. 69).

In this case, in all conventional systems, one of the set pulse and the reset pulse is set to the maximum advance angle and the other is set to the minimum advance angle, and the ignition timing is advanced between the two pulses so as to gradually increase as the speed increases. Therefore, especially when changing the maximum advance angle amount, it is necessary to change the mounting position of the pulse generator, and the adjustment is troublesome. Furthermore, it has been difficult to make the advance angle characteristic curved or line-like between the maximum and minimum advance angles so as to match the engine characteristics.

This invention was made in view of these circumstances, and not only allows the maximum advance angle to be easily changed electrically without mechanically moving the pulse generator, but also allows the advance angle characteristics to be optimized for the engine. It is an object of the present invention to provide an ignition system for an internal combustion engine that can also be adjusted to suit various conditions.

In order to achieve this object, the present invention
and a second integrator start integration from the same voltage, while a nonlinear circuit is provided between the second integrator and the comparator to transform the charging voltage of the second integrator into a polygonal shape. be. The present invention will be explained in detail below based on the drawings.

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is its circuit diagram, Fig. 3 is an output waveform diagram of each part of Fig. 2, Fig. 4 is an explanatory diagram of the same operation, and Fig. 5 is the same. It is a lead angle characteristic diagram. In FIGS. 1 and 2, reference numeral 1 denotes a pulse generator, which includes two pulser coils 2 and 3, which are connected to one permanent motor fixed to a crankshaft (not shown). It is arranged so as to face a magnet (not shown). As shown in FIGS. 3 and 4, the pulser coil 2 generates a set pulse P _s at a crank angle of θ ₁ before the top dead center TDC. Also, pulsa coil 3
Similarly, the reset pulse P is generated at a crank angle of θ ₂ before the top dead center, and this reset pulse P has a phase lag of α in the crank angle from the set pulse P _s .

The set pulse P _s and the reset pulse P 〓 are input to waveform shaping circuits 10 and 15 via diodes 4 and 5, respectively, as shown in FIG.
Each waveform shaping circuit 10, 15 includes an operational amplifier (hereinafter referred to as OP amplifier) 11, 16, respectively. The positive half waves of the pulses P _s and P〓 are connected to the 0P amplifiers 11 and 1, respectively.
6 non-inverting input terminal, each 0P amplifier 1
A constant voltage obtained by dividing the reference voltage V _z by voltage dividing resistors 12 and 13 is applied to the inverting input terminals 1 and 16 . Therefore, when each of the pulses P _s and P〓 exceeds a predetermined voltage, the 0P amplifiers 11 and 16 output a sharply rising rectangular waveform set signal SS and reset signal RR, respectively.

20 is a reset set flip-flop (hereinafter referred to as RSFF), the set end S of which receives the set signal SS, and the reset end R of which receives the set signal SS.
A reset signal RR is input to each.

30 is a constant current circuit; this constant current circuit 30
is between a PNP transistor 31 that performs current control using the reference voltage V ⁺ , a constant voltage diode 32 that creates a reference voltage V _z based on the reference voltage V ⁺ , and voltage dividing resistors 33 and 34 that divides this reference voltage V _z . A diode-connected PNP transistor 35 interposed in
The base of this transistor 35 is connected to the base of the current control transistor 31. The diode-connected transistor 35 is
This is to suppress fluctuations in the collector current of the transistor 31 due to temperature changes. Note that this reference voltage _Vz is the 0P amplifier 1 of the waveform shaping circuits 10 and 15.
It is used for the input voltage of the inverting input terminal of 1 and 16.

40 is a first integrator;
includes a parallel capacitor 41 that is charged by the output current of the constant current circuit 30, an analog switch 42 that controls on/off the charging current to the capacitor 41, and a series diode 43. The analog switch 42 is turned on when the Q output terminal of the RS/FF 20 becomes logic 1 (H level), charges the capacitor 41 with a constant current, and the charging voltage V _c1 reaches the saturation voltage. rises to.

As shown in FIG. 3, the Q output of the RS-FF 20 becomes logic 1 at a crank angle α between the set signal SS and the reset signal RR, so the capacitor 41 is charged during this period. Note that when the engine is operating at low speed, the time interval of the crank angle α becomes longer, so the capacitor 41 of the first integrator 40
saturates within this time. The left side of Figures 3 and 4 shows the output waveform at low speed, and the right side of the figure shows the output waveform at high speed _.
indicates that it is saturated.

45 is a second integrator;
includes a parallel capacitor 46 that is charged by the output current of the constant current circuit 30, an analog switch 47 that controls on/off the charging current to the capacitor 46, and a series diode 48. The analog switch 47 turns on when the output terminal of the RS FF 20 becomes logic 1 (H level).
The capacitor 46 is charged with a constant current to increase its charging voltage _Vc2 .

50 is a first discharge circuit consisting of an analog switch 51, and this analog switch 51 is referred to later as R.
- It is turned on by the Q output of the SFF 80, and the capacitor 41 of the first integrator 40 is discharged.

55 is a second discharge circuit, and this second discharge circuit 55 includes a switching transistor 56 connected in parallel with the capacitor 46 of the second integrator 45;
A differentiation capacitor 5 for turning on the transistor 56 at high speed based on the reset signal RR.
7, and a discharging resistor 58 for this capacitor 57. Therefore, the charging pressure V _c2 of the second integrator 45
changes as shown in FIGS. 3 and 4. That is, after the second discharge circuit rapidly discharges the capacitor 57 in response to the reset signal RR, the capacitor 57 is charged until the output of the RS・FF 20 returns to logic 0 in response to the set signal SS, and the capacitor 57 is charged at the crank angle α. Maintain this voltage for a while. Therefore, these first
The second integrators 40, 45 both start charging from ground voltage (zero volts) as seen in FIG.

60 is a nonlinear circuit, and the second integrator 45
and the comparator 70 described later, and the second integrator 4
The charging voltage V _c2 of No. 5 is transformed into a polygonal line shape. This nonlinear circuit 60 has a non-inverting input terminal connected to the second integrator 45.
A resistor 62 (its resistance value is _R1 ) is provided in the feedback path to its inverting input _terminal . 0P
A diode 63 and a ground resistor 64 (the resistance value of which is R ₂ ) are connected in series to the inverting input terminal of the amplifier 61 . This diode 63 is connected so that its anode is on the inverting input end side, and the reference voltage _Vz of the constant current circuit 30 is applied to its cathode via a resistor 65.

Therefore, when the current charging voltage V _c2 is below a predetermined value, a reverse voltage is applied to the diode 63, and at this time the 0P amplifier operates as a positive phase amplifier with a gain G=1. That is, as shown by the broken line in FIG. 2, a ground resistor 66 is connected to the inverting input terminal of the 0P amplifier 61
(The resistance value is R _x ) is connected,
It is known that the gain G of this positive phase amplifier is G=R _x +R ₁ /R _x =1+R ₁ /R _x (1), but if R _x →∞, then G = 1. Because it will be. In FIGS. 3 and 4, the range b in the output voltage _Vo of the OP amplifier 61 corresponds to this state.

When the charging voltage V _c2 exceeds the predetermined value and a forward voltage is applied to the diode 63, the gain G at this time is G=R _x R ₂ + R ₁ /R _x R ₂ =1+R ₁ /R ₂
(2) and the gain G increases (〓R _x →∞). Third,
The range indicated by c of the output voltage V _o in FIG. 4 corresponds to this state.

In this embodiment, the case where the resistor 66 is not provided, that is, the case where the resistance value R _x =∞ was considered, but R _x
If G is a finite value, then the gain G in the range of b is
Of course, it is also possible to change.

70 is a comparator composed of an OP amplifier 71. The non-inverting input terminal of this 0P amplifier 71 has a first
The charging voltage V _c1 which is the output of the integrator 40 and the output voltage _Vo of the nonlinear circuit 60 are input to the inverting input terminal, respectively, and when the charging voltage V _c1 exceeds the output voltage _Vo , this 0P amplifier 71 outputs logic 1 (H level).

Reference numeral 80 denotes an RS FF, and this FF 80 forms a selection circuit that selects the leading signal of the output signal of the comparator 70 and the reset signal RR. A comparator 70 is installed at the set end S of this FF80.
and the reset signal RR are both connected via diodes 81 and 82, and this connection forms a wired OR 83. Note that a grounding resistor 84 for DC bias is connected to this set end S.

The reset terminal R of the FF80 receives the set signal SS.
is input. Further, the Q output is the first discharge circuit 5.
As described above, when the Q output is on, the capacitor 41 of the first integrator 40 is discharged.

90 is an ignition output circuit, and this circuit 90 includes an ignition coil 91, an ignition plug 92 connected to the secondary side of this coil 91, and a switching transistor 92 that switches on and off the primary side current of this coil 91.
An NPN transistor 93 for driving this transistor 92 is provided. The drive transistor 93 is controlled on/off by the output of the FF 80, and the transistor 93 is turned on when the output is logic 1 (H level). Therefore, the battery voltage V _B is divided by the voltage dividing resistors 94 and 95 and applied to the base of the transistor 92.
Turn on. Note that a surge absorbing capacitor 96 is connected between the collector and emitter of the transistor 92. Further, a reference voltage V ⁺ is extracted from the battery voltage V _B via a series resistor 97 and a parallel voltage regulator diode 98, and this reference voltage V ⁺
serves as a power source for the constant current circuit 30.

Therefore, when the engine rotational speed N is low, as shown in the range _A on the left side of _FIG . 70 does not output a logic 1. For this reason, the output of the FF 80 is maintained at logic 1 until it is set by the reset signal RR input to the wired OR 83, and during this time, current flows through the primary side of the ignition coil 91. When the FF 80 is set by the reset signal RR, its output becomes logic 0 (L level), the primary current of the ignition coil 91 is cut off, and at that moment a spark is generated in the ignition plug 92. That is, the ignition advance angle θ at this time becomes the crank angle θ ₂ of the reset signal RR, as shown by A in FIG. Furthermore, this fifth
In the figure, ignition advance angle θ is the advance angle before top dead center TDC.
Indicated by BTDC.

When the engine speed N increases to the range shown in Figure 4B, the capacitor 46 of the second integrator 45, which is charged based on the reset signal RR, is
Nonlinear circuit 6 because its charging stops due to SS
The output voltage V _o of 0 is lower than that in the range A above. Therefore, the charge voltage V _c1 of the first integrator 40
reaches the voltage _Vo within the crank angle α between the set signal SS and the reset signal RR. Therefore, at this time, the comparator 70 outputs a logic 1 earlier than the reset signal RR and sets the FF 80. Note that this range B corresponds to the range c where the gain G of the nonlinear circuit 60 is 1 or more, and as the rotational speed N increases, the voltage V _o that can be reached within the crank angle α rapidly decreases, so that the ignition advance The angle θ increases rapidly as the rotational speed N increases. Figure 5B shows this situation.

When the engine rotational speed N further increases and reaches the range shown in FIG.
) is stopped by the reset signal RR and FF20. Therefore, in this range C, the nonlinear circuit 60 has a gain G=1, and its output V _o
decreases at the same rate as the charging pressure V _c1 of the first integrator 40 as the rotational speed N increases. Therefore, the ignition advance angle θ in this state is not affected by the rotational speed N and remains constant as shown in FIG. 5C.

If a finite resistance value R _x is connected to the position of the resistor 66 in the nonlinear circuit 60 in FIG. 2, the gain G of the nonlinear circuit 60 will be 1 or more even in the range b, _but the output V Since the ignition advance angle θ decreases at the same rate as the charging pressure V _c1 as N increases, the ignition advance angle θ remains constant as shown in FIG. 5C.

In this case, within the range b, the ratio of the slope of the straight line of change of the charging voltage V _c1 to the output voltage V _o with respect to time is different from that in the embodiment shown in FIG. The ignition timing, that is, the maximum advance amount is different from the embodiment shown in FIG.

FIG. 6 is a circuit diagram showing another embodiment of the nonlinear circuit 60, and this circuit 60A has an output characteristic of 2.
It is designed to be folded into stages. That is, like the diode 63 and resistors 64 and 65, a circuit consisting of a diode 63A and resistors 64A and 65A is connected in parallel to the inverting input terminal of the OP amplifier 61. In addition, in this circuit 60A, a series resistor 67 is connected to the anode side of each diode 63, 63A.
67A (respective resistance values are R ₃ and R _3a ) is inserted. Further, the voltage dividing resistors 64A, 65A and 6 are connected so that the cathode voltage of the diode 63A is lower than the cathode voltage of the diode 63.
The resistance value of 4.65 is determined.

Now, when the output voltage V _c2 of the second integrator 45 gradually increases from zero, the diode 63,
While the reverse voltage is applied to both 63A, the above
From equation (1), the gain G of this nonlinear circuit 60A is 1
becomes.

FIG. 7A is an output characteristic diagram of this nonlinear circuit 60A, and FIG. 7B is its ignition advance characteristic diagram, and the state where the gain G is 1 is indicated by E in FIG. 7A.

When the voltage V _c2 increases and forward voltage is applied only to the diode 63, the gain G becomes as shown in (2) above.
From the formula, G=1+R ₁ /R ₂ +R ₃ . Therefore, the output characteristics of this circuit 60A are bent as shown in F of FIG.

Furthermore, V _c2 increases and diodes 63 and 6
When a forward voltage is applied to both 3A and 3A, the gain G becomes G=1+R ₁ /(R ₂ +R ₃ )(R _2a +R _3a ), and the gain becomes even larger, and its output characteristic V _o becomes as shown in FIG. Become.

When V _c2 further increases, the output V _o of the 0P amplifier 61 becomes saturated, and becomes constant as shown in C of FIG.

Therefore, if this nonlinear circuit 60A is used, the ignition advance angle θ characteristic becomes as shown in FIG.

In the above embodiment, the pulse generator 1 was composed of two pulser coils 2 and 3 and one permanent magnet.
A combination of two permanent magnets and one pulser coil provided on the crankshaft side, or a coil with a magnet that has two teeth formed on the crankshaft side and uses these teeth to cut the magnetic field. It is clear that this is also possible.

Further, in this embodiment, two integrators 40, 45
Since the output current of one constant current circuit 30 is alternately time-divided and supplied, one constant current circuit is sufficient. Therefore, unlike the case where two constant current circuits are used, there is no influence due to irregularities in temperature characteristics, components, or changes over time in the characteristics of each constant current circuit, and accuracy is greatly improved.

In each of the above embodiments, the charging voltage V _c2 of the second integrator 45, which starts integration at the reset pulse, is modified by the nonlinear circuits 60 and 60A, but the present invention changes the charging voltage V _c1 and V It is clear that the desired purpose can be achieved by transforming either one of _c2 with a nonlinear circuit. That is, it goes without saying that the set pulse P _s and the reset pulse P _r may be reversed from those of these embodiments, and the present invention includes such a configuration.

As described above, the present invention starts charging two integrators from the same voltage, transforms the charging voltage of one integrator into a polygonal waveform using a nonlinear circuit, and combines the output voltage of this nonlinear circuit with the voltage of the other integrator. Since the ignition timing is detected by comparing the output of the nonlinear circuit with the output of the nonlinear circuit, the maximum advance amount can be changed by changing the gain on the zero input voltage side of the nonlinear circuit. That is, the maximum advance angle amount can be easily electrically changed by simply changing the resistance value of the nonlinear circuit. In addition, by changing the gain of each linear part of the nonlinear circuit that changes linearly, the advance angle characteristics between the maximum and minimum advance angles can be changed linearly, making it easy to adjust the advance angle characteristics that are optimal for the engine characteristics. It becomes possible to obtain

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is its circuit diagram, Fig. 3 is an output waveform diagram of each part of Fig. 2, Fig. 4 is also an explanatory diagram of the operation, and Fig. 5 is the same. FIG. 6 is a circuit diagram showing another embodiment of the nonlinear circuit, and FIGS. 7A and 7B are its output characteristic diagram and ignition advance characteristic diagram. 1... Pulse generator, 40... First integrator, 4
5...Second integrator, 60, 60A...Nonlinear circuit, 70...Comparator, 80...Flip-flop as selection circuit, _Ps ...Set pulse, P〓
...Reset pulse.

Claims (1)

[Claims] 1 A pulse generator that generates a set pulse and a reset pulse at a predetermined crank angle, a first integrator that starts integration when one of the two pulses is activated, and a first integrator that starts integration when the other pulse starts and starts integration when the one pulse The first integrator includes a second integrator that stops integrating, and a comparator that compares the charging voltages of these two integrators to control the advance angle.
The second integrator starts integration from the same voltage, and a nonlinear circuit is provided between the second integrator and the comparator to transform the charging voltage of the second integrator into a polygonal shape. Ignition system for internal combustion engines.