JPS6168517U - - Google Patents

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Publication number
JPS6168517U
JPS6168517U JP15299684U JP15299684U JPS6168517U JP S6168517 U JPS6168517 U JP S6168517U JP 15299684 U JP15299684 U JP 15299684U JP 15299684 U JP15299684 U JP 15299684U JP S6168517 U JPS6168517 U JP S6168517U
Authority
JP
Japan
Prior art keywords
parallel
diodes
generation circuit
distortion generation
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15299684U
Other languages
English (en)
Other versions
JPH0230912Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15299684U priority Critical patent/JPH0230912Y2/ja
Publication of JPS6168517U publication Critical patent/JPS6168517U/ja
Application granted granted Critical
Publication of JPH0230912Y2 publication Critical patent/JPH0230912Y2/ja
Expired legal-status Critical Current

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Description

【図面の簡単な説明】
第１図は本考案による歪発生回路の実施例を示
す回路図である。 １，２…ダイオード、３〜６…抵抗器、７〜９
…コンデンサ、１０，１１…チヨークコイル。

Claims (1)

    【実用新案登録請求の範囲】
  1. ２ケのダイオードを互に逆極性に並列に使用す
    る歪発生回路において、２ケのダイオードのそれ
    ぞれに抵抗器を並列接続した回路を直流的に直列
    接続し、この接続点を信号の入力または出力端と
    し、前記並列接続した回路の他端同士を高周波的
    に接続して信号の一方の端子とし、前記並列接続
    した回路の他端にそれぞれ抵抗器またはチヨーク
    コイルを介して直流バイアス電流を印加するよう
    に構成したことを特徴とする歪発生回路。
JP15299684U 1984-10-09 1984-10-09 Expired JPH0230912Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15299684U JPH0230912Y2 (ja) 1984-10-09 1984-10-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15299684U JPH0230912Y2 (ja) 1984-10-09 1984-10-09

Publications (2)

Publication Number Publication Date
JPS6168517U true JPS6168517U (ja) 1986-05-10
JPH0230912Y2 JPH0230912Y2 (ja) 1990-08-21

Family

ID=30711033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15299684U Expired JPH0230912Y2 (ja) 1984-10-09 1984-10-09

Country Status (1)

Country Link
JP (1) JPH0230912Y2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003347942A (ja) * 2002-05-28 2003-12-05 Matsushita Electric Ind Co Ltd 送信電力制御装置及び送信電力制御方法
US7557654B2 (en) 2004-10-28 2009-07-07 Mitsubishi Electric Corporation Linearizer
JP2012015860A (ja) * 2010-07-01 2012-01-19 Univ Of Electro-Communications 歪補償回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003347942A (ja) * 2002-05-28 2003-12-05 Matsushita Electric Ind Co Ltd 送信電力制御装置及び送信電力制御方法
US7557654B2 (en) 2004-10-28 2009-07-07 Mitsubishi Electric Corporation Linearizer
JP2012015860A (ja) * 2010-07-01 2012-01-19 Univ Of Electro-Communications 歪補償回路

Also Published As

Publication number Publication date
JPH0230912Y2 (ja) 1990-08-21

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