JPS6180848A - Electrostatic breakdown prevention element and its manufacturing method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to an electrostatic discharge prevention technique and a technique particularly effective when applied to bipolar semiconductor integrated circuit devices, such as those constructed using bipolar elements. The present invention relates to an effective technique that can be used to protect internal circuits of semiconductor integrated circuit films from electrostatic damage.

[Background technology]

Generally, circuits using current-driven elements such as bipolar elements are considered to be less likely to be destroyed by static electricity than circuits using voltage-driven elements such as C-MOS. Therefore, conventional bipolar semiconductor integrated circuit devices have not taken such elaborate measures to prevent electrostatic damage.

However, as devices become smaller and smaller, even circuits using bipolar devices are at increased risk of being destroyed by high-voltage surges such as static electricity.

As the miniaturization of these devices progresses further, the conventional simple measures to prevent electrostatic damage that have been adopted in bipolar semiconductor integrated circuit devices will no longer be sufficient, and even more reliable and thorough measures to prevent electrostatic damage will be required. come.

FIG. 1 shows a conventional electrostatic breakdown prevention element described in Japanese Patent Publication No. 53-21838.

First, in FIG. 1 (al indicates a cross-sectional state of the electrostatic breakdown prevention element 1. In the electrostatic breakdown prevention element 1 shown in the figure, a p4@ type region 21p is formed on a semiconductor substrate 11n forming an n conductivity type region. Furthermore, an n-conductivity type region 12n is formed within this p-conductivity type region 21p.

Furthermore, electrodes 4 are taken out from two mutually opposing ends of the n-conductive current region 12n formed on the innermost side. The electrode 4 taken out from one end is
If a high voltage source such as static electricity is connected, 1. The electrode 4 taken out from the other end is connected to the protected circuit 5 constituted by a bipolar element.

As described above, the electrostatic damage prevention element 1 is interposed between the input terminal terminal Pin and the protected circuit 5.

I am forced to do so.

Next, FIG. 1 (bl shows the equivalent circuit of the electrostatic damage prevention element 1 described above) can be seen as equivalently having two npn type bipolar transistors Ql and Q2. Both bipolar transistors Q
1. The emitters of Q2 are connected to each other via a resistor R]. This resistance R1 is due to parasitic resistance (diffusion layer resistance) of the n-conductivity type region 12n. Further, the respective collectors of both bipolar transistors QL and Q2 are commonly connected to each other and connected to the ground potential.

Here, the operation of the electrostatic breakdown prevention element 1 described above will be explained.

First, assume that a negative high voltage is applied to the input terminal PinK. In this case, the npQ type bipolar transistor Q1. Q2 connects the input terminal bad Pin from the ground potential side.
This n
pn type bipolar transistor Q1. Due to the conduction of Q2, a bypass current flows from the ground potential side to the input terminal pad Pin side. As a result, the high voltage applied to the input terminal Pin is voltage clamped before being applied to the protected circuit 5. As a result, the protected circuit 5 is protected from being destroyed by the negative high voltage.

Next, assume that a positive high voltage is applied to the input terminal pad Pin. In this case, the npn type bipolar transistor Q1. Q2 operates as a reverse transistor (inverse transistor) and is connected to the ground potential side region (l
lp) operates as an emitter, and the region (12n) on the input terminal pad Oin side operates as a collector. And these reverse direction transistors Ql and Q2 are
It is driven into conduction by a base current flowing from the input terminal pad Pin side to the ground potential side. Due to the conduction of the reverse direction transistors Ql and Q2, a bypass current flows from the input terminal pin side toward the ground potential side. As a result, the high voltage applied to the input terminal pad Pin is ramped to r[i before being applied to the protected circuit 5. As a result, the guaranteed circuit 5 is protected from being destroyed by the positive high voltage of 1 W.

As mentioned above, 1. The above-described conventional electrostatic damage prevention element is capable of protecting the insured circuit 5 from being destroyed by high voltages of either positive or negative polarity.

However, in the above-mentioned electrostatic discharge prevention device, the transistor is operated in the direction opposite to the Jlln direction, so that the effect of submerging the transistor against i%"bL pressure of either positive or negative polarity is obtained. The inventors of the present invention have clarified that the problem arises in that, although it is good when it operates in the forward direction, its destruction prevention operation is relatively poor when it operates in the reverse direction.In other words,
Although destruction prevention operation is performed against high voltages of either positive or negative polarity, the prevention effects are not equal;
For example, in the device mentioned above (7), the prevention effect when the polarity of the applied high voltage is positive is inevitably lower than that when the polarity of the applied high voltage is negative.For this reason, the overall evaluation as an electrostatic damage prevention device is based on its effectiveness. The value will be adjusted to the lower value of 0.

[Purpose of the invention]

An object of the present invention is to provide a structure that is relatively simple and suitable for miniaturization, and is capable of providing good performance for both positive and negative polarities of applied high voltage without being biased towards either polarity. The above-mentioned and other objects of the present invention are to provide a static destruction prevention technology that can be evaluated comprehensively higher than K. Novel features will become apparent from the description herein and the accompanying drawings.

[Summary of the invention]

Representative inventions disclosed in this application. . Wow!
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That is, by taking out the electrode from the base region of the bipolar transistor that constitutes the electrostatic damage prevention element, a relatively simple structure suitable for micro-purification can be achieved.
With respect to applied high voltages of both positive and negative polarities, it is possible to obtain a good electrostatic damage prevention effect for both polarities without being biased towards one of the polarities, thereby preventing electrostatic damage. This is intended to achieve the purpose of obtaining a comprehensively high evaluation as a device.

〔Example〕

Hereinafter, typical embodiments of the present invention will be described with reference to the drawings.

IC O, [On the two sides, the same reference numerals indicate the same or equivalent parts.

FIG. 2 shows a cross-sectional state 9 equivalent circuit and a planar layout state of an electrostatic breakdown prevention element according to an embodiment of the present invention.

In FIG. 2 (at), the electrostatic damage prevention effect 1 according to an embodiment of the present invention is shown in FIG.
It is formed on a part of the semiconductor substrate on which the − type epitaxial layer 11 is formed. On this semiconductor substrate, a microfabricated circuit is integrated and formed, and input/output terminal pads for connecting this circuit to the outside are formed. The above electrostatic damage prevention element] has its input terminal pad Pin and internal protected β
It is provided to be interposed between the circuits 5.

The region a1 where the electrostatic breakdown prevention element 1 is formed is surrounded by a p-type isolation diffusion layer 22 and electrically isolated from the surroundings. Further, in the region a1, the epitaxial layer 11 is thinly etched to form a dish-shaped recess 6, for example, by etching.

Here, as shown in FIG. 2(at), the electrostatic damage prevention element 1 has a p-type silicon semiconductor substrate 20 as a first conductivity type region, and a second conductivity type region in this first conductivity type region. selectively forms an n-type diffusion layer 12 as a
It is formed by the p+ type scattering layer 21 as a first conductivity type region selectively diffused so as to reach the type scattering layer 12.

As shown in FIG.
, Q2. ..., Qn is equivalently distributed. Each transistor Ql, Q2 . ...t A resistor RI is provided between the emitter and base of Qn, respectively.

R2 is arbitrarily interposed in series. Resistance R in this case
1 and R2 are due to the resistance of the diffusion layer 21.
. . , the collectors of Qn are not equivalently connected in common through the semiconductor substrate 20, and as shown in FIG. The input terminal pad P is connected from one of the two mutually opposing ends of the diffusion N12.
The electrode 4 connected to in@ is taken out, and the TL electrode connected to the protected circuit 5 side is taken out from the other side. This electrode 4 is formed together with the wiring using, for example, an aluminum layer formed by a vapor deposition method.

Furthermore, in this embodiment, as shown in Figure 2 1al (bl), the electrode 4 connected to the input terminal pad Pin side
is the second Nst formed inside the n-type diffusion layer 12.
It is also connected to one end of the p-type diffusion layer 21 as a type region.

Furthermore, in addition to the above-described configuration, an n+ type scattering layer 1314 for electrode extraction is additionally diffused at the location where the electrode 4 is extracted. In FIG. 2(c), the two-dot chain line indicates the contact portion 7. In FIG. In addition, the above p-type separation diffusion JvJ
It is directly connected to the 22G grounding terminal band (not shown) and grounded.

As a result of being configured as shown in the north, Figure 7;42 (b
As shown in FIG. 1, the input terminal Pin is connected from the ground potential side by the p- type silicon semiconductor substrate 20 as the first conductivity type region and the n+ type scattering layer 12 as the second conductivity type region.
Equivalently tangent α toward the side ° “Joint %” r # −)
“D I ″′; Formation i ” (1,゛ru・
1 Figure 3 ral (bl shows the operation of the electrostatic breakdown prevention element described above. 2 First, as shown in Figure 3 (al), when the polar high voltage source +Vsrg is connected to the input terminal pad Pin, In this case, the pnp bipolar transistor Q
n,...,Q2. Ql operates as a forward transistor with the p-type diffusion layer 2 as an emitter, and
The transistors Qn on the side are sequentially turned on. As a result, the bypass current p flows in the direction of the arrow, and the applied voltage from the high voltage source Vsrg is clamped in front of the protected circuit 5. The size of the arrow is determined by the bypass current p. The magnitude of this bypass current, which indicates the magnitude, is determined by the magnitude relationship between the resistors R1 and R2, and pn
The maximum current now flows through the p-type bipolar transistor Qn. As a result, the protected circuit 5 is connected to the positive high voltage source +
Saved from destruction by Vsrg.

Next, as shown in FIG. 3 (blK), it is assumed that a negative polarity high voltage source -Vsrg is connected to the input terminal pad Pin. In this case, the pnp type bipolar transistor Q
l, Q2. . . .+ Qn operates as a reverse transistor with the p-type diffusion layer 21 as its collector, and is driven to conduction in order from the transistor Q1 on the input terminal pad PinS side. As a result, the bypass current II) flows in the direction of the arrow, and the applied voltage from the high voltage source -Vsrg is clamped in front of the protected circuit 5. The thickness of the arrow indicates the size of the bypass current Ip. Show that. As a result.

The protected circuit 5 is also protected from destruction by the negative high voltage source -Vsrg. Further, in this case, the bypass current Ip also flows through the diode D1.

This bypass t'i I p flows directly from the ground potential side to the input terminal pad Pin side through the forward direction of the diode D1. This causes transistor Q1. Q2
．． . . ., a bypass current Ip flows to compensate for the deterioration in operating characteristics due to Qn operating in the reverse direction. As a result, even when the negative polarity high voltage source -Vsrg is connected, it is possible to obtain the same good electrostatic damage prevention effect as when the polar high voltage source +Vsrg is connected. As a result, it is possible to obtain an overall high evaluation as an electrostatic damage prevention element.

4th (at(bl) figure shows another embodiment of the electrostatic breakdown prevention element using this button light.

The embodiment shown in the figure is basically the same as the embodiment described above. Its feature is that an n++ buried layer 15 and an n- type epitaxial layer]1 are used as the 261α type region. Further, the p-type isolation diffusion layer 22 is located under the groove 61 (FIG. 4(a)) or under the field oxide film 62 (the fourth (FIG. 4(a)).
b) It is formed in Figure). Even with such a configuration, the same effects as those described above can be obtained.

FIG. 5 shows yet another embodiment of the electrostatic breakdown prevention device according to the present invention.

The embodiment shown in the figure is also basically the same as the embodiment shown in FIG. The reason for this is that the area where the electrostatic damage prevention element 1 is formed is flat, and the area where the electrostatic damage prevention element 1 is formed is flat, and
Even with such a configuration in which the conductivity type region is formed only by the n-type epitaxial layer 11, the same effects as those described above can be obtained.

The above four embodiments can be adopted depending on the type of manufacturing process of the semiconductor integrated circuit device in which the electrostatic breakdown prevention element is formed. In other words, by selecting the structure of the electrostatic damage prevention element from, for example, the four embodiments described above, the electrostatic damage prevention element can be formed using only the process of forming the internal circuit of a semiconductor integrated circuit device. It can be formed without adding any special process.

FIG. 6 shows an example of a method for manufacturing the electrostatic breakdown prevention element shown in FIG. 2 in the order of steps.

First, as shown in FIG. 6 (at), a semiconductor substrate having an n-type epitaxial layer 11 placed on a p-type silicon semiconductor substrate 20 is formed.

Next, as shown in FIG. 1 (bl), a dish-shaped recess 6 is formed in the region where the electrostatic breakdown prevention element is to be formed.

This concave portion 6 can be formed, for example, by etching using the surface oxide film 3 and the oxidation film 31 as a mask.After this, as shown in FIG. A scattered layer 12 is selectively diffused to a depth reaching the semiconductor substrate 2o.Furthermore, a p+ type scattered layer 21 as a 125th electric type region is formed within this "gate" type diffusion layer 12.
Form. At the same time, a p+ type layer 1 is formed around a diffusion layer 22.

As the final diffusion step, as shown in the same figure (dl), an n+ type scattering layer 13. 14
Selectively add and diffuse.

After this, as shown in Figure P1 5, an opening 71 for taking out the electrode is provided at one end of the p+ type diffusion layer 21 serving as the first conductivity type region. This opening 71 is provided at the same time as the opening for extracting the cypress in other parts. However, the diffusion layers 13 and 14 formed in the final diffusion process are left as they are without forming any openings.
．． On the surface of 14, an oxide film that is thinner than other parts remains as a trace of the mask process during the formation of the diffusion layer.

Since this partially thin surface oxide film is thinner than other parts, it must be washed off by cleaning (or etching) before other relatively thick oxidized parts.

Therefore, as shown in the same figure (fl), the final diffusion layer 13
．． By performing a cleaning treatment to remove only the partially thin oxide film left on the surface of the electrode 14, the electrodes are taken out in a self-aligned manner on the electrode extraction opening "type diffusion layers 13 and 14," respectively. An aperture 72 is formed in which a so-called auxiliary process is performed.

Once the opening for taking out the electrode has been formed, the electrode 4 is formed together with the wiring by patterning a 5K aluminum layer formed by, for example, a vapor deposition method, as shown in FIG.

In the manner described above, the electrostatic breakdown prevention element 1 of the embodiment shown in FIG. 2 can be manufactured. The embodiment of method 1 mentioned above has the advantage that when forming the electrostatic breakdown prevention element 1, it is possible to carry out the 7c wafer/nido-emi/re process, which is advantageous for fine NIB processing.

In the above embodiment, the electrode 4 connected to the input terminal pad P in is formed by forming one surface on both the [1++ diffusion layer] 3 for electrode extraction and the p+ type scattering layer 21. Contact is made through the open hole, but it is not limited to that. For example, the n-type diffusion layer 13 for electrode extraction and the p+
When the mold diffusions 21 are formed with a desired spacing, openings are formed in the oxide film 3 on both diffusion layers, and these openings are used to short-circuit both diffusion layers with an aluminum film. good.

〔effect〕

il+ By taking out the electrode from the base region of the bipolar transistor that constitutes the electrostatic breakdown prevention element, a relatively simple structure suitable for miniaturization can be achieved.
For applied high voltages of both positive and negative polarities, it is important not to be biased toward one of the polarities. This provides the effect of being able to give a comprehensive rating to the prevention element.

Although the invention made by the present inventor has been specifically explained above based on examples, it goes without saying that this invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Nor. For example, the above npn
type bipolar transistor Q1. Q2. . . . Qn may be an npn type high hole transistor.

[Application field]

In the above description, the invention made by the present inventor was mainly applied to bipolar semiconductor integrated circuit equipment, which is the background field of application, but the invention is not limited thereto. M.O.
Figure 4 (at, fb1) showing a cross-sectional state 9 equivalent circuit and planar layout design of an electrostatic breakdown prevention element according to an embodiment of the invention, which can be applied to semiconductor integrated circuit devices of mixed type. Figure 5 shows a cross-sectional state of an electrostatic damage prevention element according to another embodiment of the present invention; Figure 5 shows a cross-sectional state of an electrostatic damage prevention element according to still another embodiment of the invention; Figures a) to fg1 are diagrams showing, in order of steps, an embodiment of the main part of the method for expanding the electrostatic breakdown prevention element shown in Figure 2.

Pin...Input terminal pad to which high '4 voltage is applied, 1
... Shitori break?) prevention element, 11. lln...Second conductivity type confined region (n-type epitaxial layer), 12.12n.
...225th electric type region (n" type diffusion layer), 13.14
...'i, n+ type diffusion for 5-pole extraction):i, 15...
・N1 type implantation, 20... p- forming the J Jinden type Tsukuda area
Type silicon semi-isomer 9-21, 2ip... 1st conductivity type region (p type diffusion layer), 22... p type separation diffusion J8
．． 3... Surface oxide film, 31... Nitride film, 4... Electrode, 5... Circuit to be preserved, 6... Concave portion, 7... Contact portion, 61... Groove, 62 ... Field oxide film, 71.72 ... Electrode extraction hole, Ql, Q2.・
..., Qn...pnp type bipolar transistor, D
I =...diode, +Vsrg, -Vs
r gFigure 1 (,2) Figure 3 Figure 2. t (a-) (4:( 4th (L) Figure ζ 4th (b) 1st Figure 5 Figure 6 (H) Figure 6 'r'' (C3 Figure 6! θ''

Claims (1)

[Claims] 1. A bipolar transistor with a vertical structure in which a first conductivity type region is further formed in a second conductivity type region formed in a first conductivity type region, A bipolar electrostatic capacitor that clamps the applied high voltage and protects the protected circuit from destruction by the applied high voltage by operating as a forward transistor or reverse transistor depending on the polarity of the externally applied high voltage. In the destruction prevention element, an electrode connected to the side to which the high voltage is applied is taken out from one of the two opposing ends of the second conductivity type region, and the electrode connected to the side to which the high voltage is applied is taken out from the other end. An electrostatic breakdown prevention element characterized by having an electrode connected to the protection circuit side taken out. 2. Claims characterized in that the electrode connected to the side to which the high voltage is applied is connected to one end of the first conductivity type region formed inside the second conductivity type region The electrostatic breakdown prevention element according to item 1. 3. A vertical structure bipolar transistor is formed by further forming a first conductivity type region within a second conductivity type region formed within the first conductivity type region, and this bipolar transistor is connected to an externally applied high voltage. A bipolar electrostatic discharge prevention element that clamps the applied high voltage and protects the protected circuit from damage caused by the applied high voltage by operating as a forward transistor or a reverse transistor depending on the polarity of the device. A method for manufacturing a semiconductor device, wherein an electrode connected to the side to which the high voltage is applied is taken out from one of the two opposing ends of the second conductivity type region, and the electrode connected to the side to which the high voltage is applied is taken out from the other end. In addition to performing a step of taking out the electrodes to be connected to the protection circuit side, as a step before forming the electrodes, a step of selectively diffusing a diffusion layer for taking out the electrodes in the electrode take-out portion is carried out in advance, and this selective diffusion is performed. A method for manufacturing an electrostatic breakdown prevention element, characterized in that the opening for taking out the electrode is formed in a self-aligned manner by removing a partially thin surface oxide film left on the trace by a cleaning process.