JPS618318U - 3 terminal regulator - Google Patents
3 terminal regulatorInfo
- Publication number
- JPS618318U JPS618318U JP9024484U JP9024484U JPS618318U JP S618318 U JPS618318 U JP S618318U JP 9024484 U JP9024484 U JP 9024484U JP 9024484 U JP9024484 U JP 9024484U JP S618318 U JPS618318 U JP S618318U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- terminal regulator
- terminal pins
- output
- grounding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の３端子レギュ、レータの回路図、第２
図は集積回路化した３端子レギュレータの外観図である
。
１・・・３端子レギュレータのパッケージ、２・・・入
力用の端子ピン、３・・・接地用の端子ピン、４・・・
出力用の端子ピン、５・・・演算増幅器、６・・・基準
電圧発生回路、７・・・バイアス回路。Figure 1 is a circuit diagram of the three-terminal regulator and regulator of the present invention.
The figure is an external view of a three-terminal regulator integrated into an integrated circuit. 1...3-terminal regulator package, 2...terminal pin for input, 3...terminal pin for grounding, 4...
Terminal pin for output, 5... operational amplifier, 6... reference voltage generation circuit, 7... bias circuit.
Claims (1)
ピンの内の中央の端子ビンが接地用、両外側の端子ピン
が各々入力用、出力用として設けられ、且つ内部回路が
集積回路化された３端子レギュレータにおいて、 出力用トランジスタのコレクタと兎ミツタとの間に逆並
列接続されるように保護用ダイオードを形成したことを
特徴とする３端子レギュレータ。[Claim for Utility Model Registration] Three terminal pins protrude from the package, the center terminal bin of the three terminal pins is provided for grounding, and the terminal pins on both outer sides are provided for input and output, respectively. , and a three-terminal regulator whose internal circuit is an integrated circuit, characterized in that a protective diode is formed so as to be connected in antiparallel between the collector of the output transistor and the capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9024484U JPS618318U (en) | 1984-06-19 | 1984-06-19 | 3 terminal regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9024484U JPS618318U (en) | 1984-06-19 | 1984-06-19 | 3 terminal regulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS618318U true JPS618318U (en) | 1986-01-18 |
Family
ID=30645063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9024484U Pending JPS618318U (en) | 1984-06-19 | 1984-06-19 | 3 terminal regulator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS618318U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5940916B2 (en) * | 1980-12-22 | 1984-10-03 | セイコーエプソン株式会社 | Manufacturing method for exterior parts for mobile watches |
-
1984
- 1984-06-19 JP JP9024484U patent/JPS618318U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5940916B2 (en) * | 1980-12-22 | 1984-10-03 | セイコーエプソン株式会社 | Manufacturing method for exterior parts for mobile watches |
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