JPS6183392U - - Google Patents
Info
- Publication number
- JPS6183392U JPS6183392U JP16881684U JP16881684U JPS6183392U JP S6183392 U JPS6183392 U JP S6183392U JP 16881684 U JP16881684 U JP 16881684U JP 16881684 U JP16881684 U JP 16881684U JP S6183392 U JPS6183392 U JP S6183392U
- Authority
- JP
- Japan
- Prior art keywords
- channel
- image signal
- circuit
- address
- identification code
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Television Systems (AREA)
Description
第１図は本考案の一実施例のブロツク図、第２
図はこの実施例に入力される画像信号の構成の一
例を示す図である。
１…画像信号入力端子、２…クロツク信号入力
端子、３…カウンタ、４…メモリ、５…ゲート、
１１〜１４…チヤンネル。
Figure 1 is a block diagram of one embodiment of the present invention;
The figure is a diagram showing an example of the structure of an image signal input to this embodiment. 1... Image signal input terminal, 2... Clock signal input terminal, 3... Counter, 4... Memory, 5... Gate,
11-14...Channel.
Claims (1)
ある画像信号を複数のチヤンネルに分配するゲー
ト回路と、前記画像信号のクロツクを計数しクロ
ツク数を出力する回路と、前記チヤンネルを現わ
す識別符号が記憶してある回路とが備えてあり、
前記記憶回路は前記クロツク数に対応する番地か
ら前記チヤンネル符号を読出し、前記番地には当
該番地に対応する前記クロツク数の時間位置の前
記画像信号が分配されるべき前記チヤンネルの前
記識別符号が記憶してあり、前記ゲートは前記記
憶回路から読出される前記識別符号の前記チヤン
ネルに前記画像信号を分配することを特徴とする
画像データ分配装置。 A gate circuit that distributes an image signal in which a plurality of image data is expressed in a time division multiplexed code to a plurality of channels, a circuit that counts clocks of the image signal and outputs the number of clocks, and an identification code that indicates the channel. It is equipped with a circuit that stores
The storage circuit reads the channel code from an address corresponding to the clock number, and stores at the address the identification code of the channel to which the image signal at the time position of the clock number corresponding to the address is to be distributed. An image data distribution device, wherein the gate distributes the image signal to the channel of the identification code read from the storage circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16881684U JPS6183392U (en) | 1984-11-07 | 1984-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16881684U JPS6183392U (en) | 1984-11-07 | 1984-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6183392U true JPS6183392U (en) | 1986-06-02 |
Family
ID=30726579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16881684U Pending JPS6183392U (en) | 1984-11-07 | 1984-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6183392U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01240090A (en) * | 1988-03-22 | 1989-09-25 | Nippon Bijinesu Television Kk | Satellite video transmission system |
-
1984
- 1984-11-07 JP JP16881684U patent/JPS6183392U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01240090A (en) * | 1988-03-22 | 1989-09-25 | Nippon Bijinesu Television Kk | Satellite video transmission system |
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