JPS6186889U - - Google Patents
Info
- Publication number
- JPS6186889U JPS6186889U JP17270384U JP17270384U JPS6186889U JP S6186889 U JPS6186889 U JP S6186889U JP 17270384 U JP17270384 U JP 17270384U JP 17270384 U JP17270384 U JP 17270384U JP S6186889 U JPS6186889 U JP S6186889U
- Authority
- JP
- Japan
- Prior art keywords
- input
- signal
- input terminal
- signal detector
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Description
第１図は本考案カウンタ装置の概略構成図、第
２図及び第３図は同装置における回転体の正回転
時及び逆回転時の信号を説明するタイムチヤート
、第４図は従来のカウンタ装置の概略構成図、第
５図及び第６図は同装置における回転体の正回転
時及び逆回転時の信号を説明するタイムチヤート
である。
１０……回転体、１１……反射板、１２……信
号検出器、１４……演算増幅器、１７……第１積
分回路、２０……第２積分回路、２１……カウン
タコントローラ、２２……表示器。
Fig. 1 is a schematic configuration diagram of the counter device of the present invention, Figs. 2 and 3 are time charts explaining signals when the rotating body rotates forwardly and reversely in the same device, and Fig. 4 is a conventional counter device. The schematic configuration diagram of FIG. 5 and FIG. 6 are time charts illustrating signals during forward and reverse rotation of the rotating body in the same device. 10... Rotating body, 11... Reflection plate, 12... Signal detector, 14... Operational amplifier, 17 ... First integrating circuit, 20 ... Second integrating circuit, 21... Counter controller, 22... display.
Claims (1)
の回転に対応して発生する異なる二つの鋸歯状波
信号を検出する一つの信号検出器と、前記信号検
出器からの信号が非反転入力端子に入力されると
共に該信号が第１積分回路を通じて反転入力端子
に入力される演算増幅器と、前記信号検出器から
の信号がクロツク入力端子に入力されると共に前
記演算増幅器の出力が第２積分回路を通じて加減
指定端子に入力されるカウンタコントローラとよ
り成り、該カウンタコントローラの出力を表示器
に入力するように構成したことを特徴とするテー
プカウンタ装置。 one signal detector that detects two different sawtooth wave signals generated in response to the rotation of a rotating body that rotates in a direction corresponding to the tape running direction, and a signal from the signal detector that is connected to a non-inverting input terminal. an operational amplifier, the signal of which is input to the inverting input terminal through a first integrating circuit; and a signal from the signal detector is input to the clock input terminal, and the output of the operational amplifier is input to the clock input terminal through a second integrating circuit; 1. A tape counter device comprising a counter controller input to an addition/subtraction designation terminal, and configured such that the output of the counter controller is input to a display.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17270384U JPS6186889U (en) | 1984-11-14 | 1984-11-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17270384U JPS6186889U (en) | 1984-11-14 | 1984-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6186889U true JPS6186889U (en) | 1986-06-06 |
Family
ID=30730365
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17270384U Pending JPS6186889U (en) | 1984-11-14 | 1984-11-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6186889U (en) |
-
1984
- 1984-11-14 JP JP17270384U patent/JPS6186889U/ja active Pending
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