JPS6188231A - Optical bistable circuit - Google Patents

Optical bistable circuit

Info

Publication number
JPS6188231A
JPS6188231A JP21072384A JP21072384A JPS6188231A JP S6188231 A JPS6188231 A JP S6188231A JP 21072384 A JP21072384 A JP 21072384A JP 21072384 A JP21072384 A JP 21072384A JP S6188231 A JPS6188231 A JP S6188231A
Authority
JP
Japan
Prior art keywords
optical
light
semiconductor laser
bistable
optical amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21072384A
Other languages
Japanese (ja)
Other versions
JPH0578808B2 (en
Inventor
Isao Kobayashi
功郎 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21072384A priority Critical patent/JPS6188231A/en
Publication of JPS6188231A publication Critical patent/JPS6188231A/en
Publication of JPH0578808B2 publication Critical patent/JPH0578808B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F3/00Optical logic elements; Optical bistable devices
    • G02F3/02Optical bistable devices
    • G02F3/026Optical bistable devices based on laser effects

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To obtain an optical bistable circuit which operates with a low light trigger by employing a method which amplifies external input trigger light by an optical amplifier and then applies it to a bistable semiconductor laser. CONSTITUTION:The bistable semiconductor laser 1 base hysteresis in its current- light output characteristic and light input-light output characteristic. Then when the input trigger light 200 is made incident from the incidence terminal 120 of the optical amplifier 2 while a proper bias current is applied, it is amplified in an optical amplifier active area 100 and enters a light guide 110. The light guide 110 is coupled optically with the striped active area of the semiconductor laser 1, so amplified input trigger light 200 is supplied to the bistable semiconductor laser 1, which is triggered into the 'on' state. The necessary level of this trigger light 200 may be extremely small because it is amplified by the optical amplifier 2, and therefore the optical bistable circuit which operates with the low trigger input is obtained.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は光論理回路や光記憶回路用の光双安定回路に
関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an optical bistable circuit for optical logic circuits and optical storage circuits.

(従来技術と問題点) 光による信号処理を自差した各種の光回路の研究開発が
進められている。これらの光回路、特に光論理回路や光
記憶回路を構成する基本的な光回路に、光双安定回路が
ある。これは、ある光入力に対して安定な2つの光出力
レベルをとれる光回路である。従来、このような光双安
定回路として半導体レーザの共振器軸方向に、利得領域
と可飽和吸収領域を直列に配置した双安定半導体レーザ
の応答速度を持つこと等いくつかの望ましい特長を持っ
ている。しかしながら、この双安定半導体レーザには、
それをオン状態にトリガーするためにやや大きい光トリ
ガ入力を要するという問題点があった。%に、高速の信
号処理に用いようとして光トリガ入力のパルス幅を小さ
くしていくとその人力トリガレベルが急激に増大すると
いう問題点がさけがたかった。
(Prior Art and Problems) Research and development is progressing on various optical circuits that perform signal processing using light. An optical bistable circuit is a basic optical circuit constituting these optical circuits, especially optical logic circuits and optical storage circuits. This is an optical circuit that can provide two stable optical output levels for a given optical input. Conventionally, such an optical bistable circuit has several desirable features, such as having the response speed of a bistable semiconductor laser in which a gain region and a saturable absorption region are arranged in series in the cavity axis direction of a semiconductor laser. There is. However, this bistable semiconductor laser has
The problem was that it required a rather large optical trigger input to trigger it into the on state. %, the unavoidable problem is that when the pulse width of the optical trigger input is reduced in an attempt to use it for high-speed signal processing, the manual trigger level increases rapidly.

(発明の目的) 本発明の目的は、低光トリガ入力で動作可能な光双安定
回路を提供することにある。
(Object of the Invention) An object of the present invention is to provide an optical bistable circuit that can operate with a low optical trigger input.

(発明の構成) 本発明によれば、増幅領域と可飽和吸収領域を有する双
安定半導体レーザと、それに光学的に結合した平行に設
置された光導波路と、その光導波路に結合された光増幅
器とを含む低トリガレベル複合光双安定回路か得られる
(Structure of the Invention) According to the present invention, there is provided a bistable semiconductor laser having an amplification region and a saturable absorption region, an optical waveguide optically coupled thereto and installed in parallel, and an optical amplifier coupled to the optical waveguide. A low trigger level composite optical bistable circuit is obtained.

(発明の作用、効果) 本発明では、双安定半導体レーザにおける光トリガレベ
ルを低減するために、外部からの入力トリガ光を光増幅
器で増幅した後に双安定半導体レーザへ印加するという
方法を採用している。しかもその印加力法として、双安
定半導体レーザのストライプ状の活性領域に平行に沿わ
せ光学的に結合させた光導波路を介しているので、安定
な動作が期待できる。
(Operations and Effects of the Invention) In order to reduce the optical trigger level in a bistable semiconductor laser, the present invention employs a method in which an externally input trigger light is amplified by an optical amplifier and then applied to the bistable semiconductor laser. ing. Furthermore, since the applied force is applied via an optical waveguide parallel to the striped active region of the bistable semiconductor laser and optically coupled, stable operation can be expected.

以下図面を参照して本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.

(実施例) 第1図は本発明の実施例の双安定半導体レーザと光増幅
器の相対的な位置関係を示すための構成図、第2図はそ
の斜視図、第3図(a)(b)(c)は断面図をそれぞ
れあられす。双安定半導体レーザ1は、第1及び第2の
増幅部20及び30と、吸収領域10とからなるストラ
イプ状活性領域を有する。
(Example) Fig. 1 is a configuration diagram showing the relative positional relationship between a bistable semiconductor laser and an optical amplifier according to an embodiment of the present invention, Fig. 2 is a perspective view thereof, and Fig. 3 (a) (b). ) and (c) are cross-sectional views, respectively. The bistable semiconductor laser 1 has a striped active region including first and second amplification sections 20 and 30 and an absorption region 10.

光増幅器2は、双安定半導体レーザ1の活性領域に平行
で近接した光導波路110と、それ(こ接続された光増
幅器活性領域100とを有する。この構成で、双安定半
導体レーザ1は、電流−光出力特性及び光入力−光出力
特性にヒステリシスを示す。適当なバイアス電流をかけ
た状態で光増幅器2の入射端120から入力1− IJ
ガ光200を入射させると、それは光増幅器活性領域1
00で増幅され光導波路110に入射する。光導波路1
10は、双安定半導体レーザ1のストライプ状活性領域
と光学的に結合されているので、増幅された入力トリガ
光200は双安定半導体レーザ1へ結合され、双安定半
導体レーザ1を「オン」状態(こトリガする。このトリ
ガ光200の必要なレベルは光増幅器2で増幅されるの
できわめて小さくて良い。
The optical amplifier 2 includes an optical waveguide 110 parallel to and close to the active region of the bistable semiconductor laser 1 and an optical amplifier active region 100 connected thereto. With this configuration, the bistable semiconductor laser 1 - Shows hysteresis in optical output characteristics and optical input-optical output characteristics.With an appropriate bias current applied, the input from the input end 120 of the optical amplifier 2 to the input 1-IJ
When optical light 200 is incident, it enters the optical amplifier active region 1.
00 and enters the optical waveguide 110. Optical waveguide 1
10 is optically coupled to the striped active region of the bistable semiconductor laser 1, so that the amplified input trigger light 200 is coupled to the bistable semiconductor laser 1 and turns the bistable semiconductor laser 1 into the "on" state. (The required level of this trigger light 200 is amplified by the optical amplifier 2, so it can be extremely small.

この複合光安定回路は、以下のようにして製作される。This composite optical stabilizer circuit is manufactured as follows.

まずn型のInPの基板40の上に、n −IrJPの
バッファ層41.ノンドープのInGaASP活性層4
2.P−inpのクラッド層43を連続的に結晶成長し
て二重へテロ結晶を作製する。次に、通常のフォトリソ
グラフィと化学エツチングとにより、第1のチャンネル
対50及び第2のチャンネル対51を形成する。第1の
チャンネル対50は双安定半導体レーザlのストライプ
状活性領域をまわりの領域から区別し、第2のチャンネ
ル対51は光増幅器2の光増幅器活性領域100及び光
導波路110をまわりの領域から区別する。
First, on an n-type InP substrate 40, an n-IrJP buffer layer 41. Non-doped InGaASP active layer 4
2. The P-inp cladding layer 43 is continuously grown to form a double heterocrystal. Next, a first channel pair 50 and a second channel pair 51 are formed by conventional photolithography and chemical etching. A first channel pair 50 distinguishes the striped active region of the bistable semiconductor laser l from the surrounding region, and a second channel pair 51 distinguishes the optical amplifier active region 100 and the optical waveguide 110 of the optical amplifier 2 from the surrounding region. distinguish.

各チャンネル対のチャンネルの幅はいずれも約7μm、
これらではさまれるメサの幅は1〜1.5μmとした。
The channel width of each channel pair is approximately 7 μm.
The width of the mesa sandwiched between these was 1 to 1.5 μm.

この状態のウェハーを液相成長炉に入れP−1npの第
1の電流ブo ツク層44.n−Ir1Pの第2の電流
ブロック層45.P−InPの埋め込み層46、P−J
nQaAspのキー?7プ層47を連続して成長する。
The wafer in this state is placed in a liquid phase growth furnace and a P-1np first current block layer 44. Second current blocking layer 45 of n-Ir1P. Buried layer 46 of P-InP, P-J
nQaAsp key? Seven layers 47 are grown successively.

このとき、成長メルトの過飽和度及び成長時間等を適切
に設定することにより、第3図(a)および(b)で示
した領域、すなわち双安定半導体レーザ1の活性領域の
第1及び第2の増幅部20及び30の部分、それに光増
幅器2の光増幅器活性領域100の部分では、第1及び
第2の電流ブロック層44及び45が、第1及び第2の
チャンネル対50及び51で形成されたメサの上部には
全く成長しないようにできる。また、第3図(C)で示
した領域、すなわち双安定半導体レーザ1のストライプ
状活性領域の吸収領域10と光増幅器2の光導波路11
0が近接した部分では、両者が近接した結果、両者のメ
サが形成する全体のメサ幅が大きくなるため、第2の電
流ブロック層45がその両者のメサの上をおおうように
成長させることができる。
At this time, by appropriately setting the supersaturation degree and growth time of the grown melt, the regions shown in FIGS. In the amplification sections 20 and 30 of the optical amplifier 2 and in the optical amplifier active region 100 of the optical amplifier 2, first and second current blocking layers 44 and 45 are formed with first and second channel pairs 50 and 51. It is possible to prevent any growth from occurring on the top of the mesa. Furthermore, the regions shown in FIG. 3(C), that is, the absorption region 10 of the striped active region of the bistable semiconductor laser 1 and the optical waveguide 11 of the optical amplifier 2
In the part where the mesas 0 are close to each other, as a result of the two being close to each other, the overall width of the mesa formed by both mesas becomes large, so it is not possible to grow the second current blocking layer 45 so as to cover the tops of both mesas. can.

このようにして形成したウェハーに、n側電極60とし
て全面にhn−ae−Nrを、第1.第2.第3(7)
Plillを極61,62.63として(:r−Anを
それぞれ蒸着、熱処理により形成する。ここで、第1及
び第2のP側電極61及び62は双安定半導体し−サ1
の共振器軸方向に分割されており、それぞれ第1及び第
2の光増幅部20及び30の上部に対応する位置に形成
されている。一方、第3のP側電極63は、光増幅器2
の活性領域100の上部に対応する位置に形成されてい
る。
The wafer thus formed was coated with hn-ae-Nr over the entire surface as the n-side electrode 60. Second. 3rd (7)
The first and second P-side electrodes 61 and 62 are made of bistable semiconductors.
are divided in the resonator axis direction, and are formed at positions corresponding to the upper portions of the first and second optical amplification sections 20 and 30, respectively. On the other hand, the third P-side electrode 63 is connected to the optical amplifier 2
The active region 100 is formed at a position corresponding to the upper part of the active region 100.

この複合光双安定回路の第1及び第2のP側電極61及
び62にそれぞれ30mAl、2On+Aを流しておき
、双安定半導体レーザ1の一方の共振器端面70からの
入カドリカ光210を注入すると、もう一方の共振器端
面71からの光出力220は入力トリガ光レベルか約5
0Fのとき「オン」状態にトリ力された。この状態で第
3の、pmm他極6350mA流しておき、入射端12
0から入力) IJガ光200を注入したところ約2,
5sWのとき「オン」状態にトリガされた。すなわち、
本発明では、光増幅器2を集積化することにより、低ト
リカレベルの光双安定回路が実現された。
When 30 mAl and 2 On+A are flowed into the first and second P-side electrodes 61 and 62 of this composite optical bistable circuit, respectively, and the incident quadratic light 210 from one resonator end face 70 of the bistable semiconductor laser 1 is injected. , the optical output 220 from the other resonator end face 71 is at the input trigger light level or about 5
When it was 0F, it was tripped to the "on" state. In this state, 6350 mA is applied to the third PMM other pole, and the input end 12
Input from 0) When IJ Gakko 200 was injected, about 2,
Triggered to "on" state at 5sW. That is,
In the present invention, by integrating the optical amplifier 2, an optical bistable circuit with a low trigger level is realized.

この実施例では、双安定半導体レーザ1のストライブ状
活性領域と光増幅器2の光導波路110が近接して形成
された部分は、結晶成長の性質により自動的にn−1n
pがかぶることになり、電流が流れにくい領域となる。
In this embodiment, the portion where the striped active region of the bistable semiconductor laser 1 and the optical waveguide 110 of the optical amplifier 2 are formed close to each other automatically forms n-1n due to the nature of crystal growth.
This overlaps with p, resulting in a region where it is difficult for current to flow.

すなわち、双安定半導体レーザ1の可飽和吸収領域が自
動的に形成されるという利点を持つ。
That is, there is an advantage that the saturable absorption region of the bistable semiconductor laser 1 is automatically formed.

伺、上記実施例では双安定半導体レーザは埋め込み構造
を採用したのでストライブ状活性領域はストライブ状に
形成された積層構造になっていたが、他の構造、例えば
プレーナストライブ構造のように積層構造はストライブ
構造ではないが、電流が注入される領域がストライプ状
になっておりこの電流注入領域がストライブ状活性領域
となるような構造でも本発明の光双安定回路は得られる
In the above embodiment, the bistable semiconductor laser adopted a buried structure, so the striped active region had a laminated structure formed in a striped shape. However, other structures, such as a planar striped structure, Although the laminated structure is not a striped structure, the optical bistable circuit of the present invention can also be obtained with a structure in which the region into which current is injected is striped, and this current injection region becomes a striped active region.

また、これは光増幅器2についても同様である。Further, this also applies to the optical amplifier 2.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の構成図、第2図はその斜視
図、第3図は断面図をそれぞれあられす。 図において、1は双安定半導体レーザ、2は光増幅器、
lOは吸収領域、20.30は増幅部、40はInP基
板、41はバッファ層、42は活性層、43はクラッド
層、44.45は電流ブロック層、46は埋め込み層、
47はキャップ層、50.51はチャンネル対、60〜
63は電極、1ooは活性領域、110は光導波路をそ
れぞれあられす。 マ???マ オ 3 図
FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a perspective view thereof, and FIG. 3 is a sectional view thereof. In the figure, 1 is a bistable semiconductor laser, 2 is an optical amplifier,
1O is an absorption region, 20.30 is an amplification section, 40 is an InP substrate, 41 is a buffer layer, 42 is an active layer, 43 is a cladding layer, 44.45 is a current block layer, 46 is a buried layer,
47 is a cap layer, 50.51 is a channel pair, 60~
63 is an electrode, 1oo is an active region, and 110 is an optical waveguide. Ma? ? ? Mao 3 figure

Claims (1)

【特許請求の範囲】[Claims] ストライプ状活性領域を含む積層構造を備えた双安定半
導体レーザと、この双安定半導体レーザにトリガ光を導
びく光増幅器とを備え、前記ストライプ状活性領域は光
増幅部と光吸収領域とを備え、この光増幅部上方にこの
光増幅部へ電流注入する電極を少なくとも備え、前記光
増幅器は、前記ストライプ状活性領域に平行に配置され
て光学的に結合された光導波路とこの光導波路に接続さ
れた光増幅器活性領域とを少なくとも備えていることを
特徴とする光双安定回路。
A bistable semiconductor laser having a laminated structure including a striped active region, and an optical amplifier that guides trigger light to the bistable semiconductor laser, and the striped active region includes an optical amplification section and an optical absorption region. , comprising at least an electrode above the optical amplifying section for injecting a current into the optical amplifying section, and the optical amplifier is connected to an optical waveguide arranged parallel to the striped active region and optically coupled to the optical waveguide. An optical bistable circuit comprising at least an optical amplifier active region.
JP21072384A 1984-10-08 1984-10-08 Optical bistable circuit Granted JPS6188231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21072384A JPS6188231A (en) 1984-10-08 1984-10-08 Optical bistable circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21072384A JPS6188231A (en) 1984-10-08 1984-10-08 Optical bistable circuit

Publications (2)

Publication Number Publication Date
JPS6188231A true JPS6188231A (en) 1986-05-06
JPH0578808B2 JPH0578808B2 (en) 1993-10-29

Family

ID=16594032

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21072384A Granted JPS6188231A (en) 1984-10-08 1984-10-08 Optical bistable circuit

Country Status (1)

Country Link
JP (1) JPS6188231A (en)

Also Published As

Publication number Publication date
JPH0578808B2 (en) 1993-10-29

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