JPS6188543A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain multilayer wiring without disconnection by depositing a first insulation film to a semiconductor substrate of one conductivity type, introducing impurity of reverse conductivity type into the substrate through such film, covering the entire part with a second and a third insulating film, providing a resist pattern having aperture, executing the anisotropic etching to it and then sagging a third insulating film at the edge of aperture. CONSTITUTION:A first insulating film SiO2 12 is deposited on a P type Si substrate 11, the N type impurity ion is implanted and forced to diffuse through such film in order to form an N type region 13 at the surface of substrate 11. An interlayer insulating film 14 of SiO2 and a thin BBSG film 17 are caused to grow on the film 12 by the vapor growth method and thereby a pattern of photo resist 15 having aperture is provided. The anisotropic etching is carried out to the films 17, 14 and 12. An aperture is formed, exposing a part of region 13. Thereafter, the resist 15 is removed, heat processing is carried out, the film 17 at the edge of aperture is sagged, eliminating sharp angled portion. Thereafter, the Al electrode 16 being in contact with the region 13 is buried within the aperture and the upper end portion thereof is extended on the film 17.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device having a multilayer wiring structure.

(Prior art) Conventionally, in manufacturing a semiconductor device with a multilayer wiring structure, an interlayer insulating film is provided between a lower wiring and an upper wiring, and an opening is formed in the interlayer insulating film to connect the lower wiring and the lower wiring. It is carried out.

FIGS. 2 fa) to 2 fc) are cross-sectional views for explaining a part of the manufacturing process of a conventional semiconductor device.

First, as shown in FIG. 2(a), a silicon oxide film 2 is formed on the entire surface of a P-type silicon substrate 1 by thermal oxidation, and then the silicon oxide film 2 is entirely penetrated by ion implantation. An impurity having a conductivity type opposite to that of the substrate, that is, an N-type impurity is introduced into the substrate to form the entire diffusion layer region 3.

Next, an interlayer insulating film 4 is formed on the silicon dioxide film 2 by vapor phase growth.

Next, as shown in FIG. 2(b), a predetermined pattern is formed on the interlayer insulating film 4 using a photoresist 5. Then, as shown in FIG.

Next, as shown in FIG. 2 (C1), the interlayer insulating film 4 and the silicon oxide film 2 are etched anisotropically to form a hole. After removing this photoresist 5, an aluminum electrode 6 is formed thereon. do.

(Problems to be solved by the invention) In the structure of the aluminum electrode window formed in this way,
Since the edge of the opening is steep, there is a problem in that the aluminum electrode 6 is easily disconnected at that portion, and the function as a semiconductor device is lost.

The purpose of the present invention is to eliminate the above-mentioned drawbacks, reduce disconnections in openings of metal electrodes and wiring, and improve yield.

An object of the present invention is to provide a method for manufacturing a semiconductor device that can improve reliability.

(Means for Solving the Problems) A method for manufacturing a semiconductor integrated circuit device of the present invention includes the steps of: fully depositing a first insulating film on one main surface of a semiconductor substrate having one conductivity type; a step of introducing an impurity tS of the opposite conductivity type through the insulating film, a step of depositing a second insulating film on the first insulating film, and a step of depositing a third thin insulating film on the second insulating film. forming a pattern of photoresist on the third insulating film; forming a pattern of photoresist on the third insulating film; Second. The method includes a step of anisotropically etching the third insulating film, a step of removing the photoresist, and a step of heat-treating the third thin insulating film at the edge of the opening.

(Example) Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(e) are sectional views for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a P-type silicon substrate 1
A silicon dioxide film 12 is formed as a first insulating film on one main surface of the silicon dioxide film 1 by a thermal oxidation method. Next, an impurity that provides conductivity type opposite to that of the substrate, that is, N type, is introduced into the substrate through the silicon dioxide film 12 by ion implantation to form a diffusion region 13. Next, an interlayer isolation film 142 is formed as a second insulating film on the silicon dioxide film 12 by vapor phase growth.

As a VC third insulating film on this interlayer insulating film, B2H, :P
H3: Thin BP made by vapor phase growth method using SiH4 as a component
Form SG@17.

Next, as shown in FIG. 1(b), a photoresist 15
form a pattern.

Next, as shown in FIG. 1 (C1), the photoresist 15
A thin BPSP film 17 and an interlayer insulating film 1 are formed using the mask as a mask.
4 and the silicon dioxide film 12 are anisotropically etched.

Next, as shown in FIG. 1 (dl), the photoresist 15
is removed and heat treated in a high temperature atmosphere to reduce the thickness of the opening edge.
．． -, BPSG membrane 17 Zenyu Usu.

Next, as shown in FIG. 1, an aluminum b:i pole i6i is formed by a normal method.

In this way, by heat treatment in a high-temperature atmosphere to form a thin BPSG film, it is possible to completely close the three edges of the opening, eliminate sharp corners, and reduce the thickness of the upper conductive layer at the edge of the opening. It is possible to reduce disconnections.

(Effects of the Invention) As described above, according to the present invention, there is provided a method for manufacturing a semiconductor device that can reduce disconnections of wiring in the openings of the interlayer insulating film of multilayer wiring.

[Brief explanation of drawings]

FIGS. 1(a) to (e) are cross-sectional views shown in the order of steps for explaining one embodiment of the present invention, and FIGS. 2(a) to (C) are part of the conventional manufacturing process of a semiconductor device. ? It is a manufacturing process sectional view for explaining. 1.11...P-type nest crystal silicon substrate, 2.1
2...Silicon dioxide film, 3,13...
Impurity diffusion region, 4.14...Interlayer insulating film, 5
．． 15...Photoresist, 6.16...
- Aluminum electrode, 17...BP8G film. (a)
(d)(b)
ζC) (c) No. tfEJ (0,) Cbn (Cn leather figure 2

Claims (2)

[Claims] (1) A first layer on one main surface of a semiconductor substrate having one conductivity type.
a step of introducing an impurity of an opposite conductivity type through the first insulating film; a step of depositing a second insulating film on the first insulating film; a step of depositing a third thin insulating film on the second insulating film; a step of forming a photoresist pattern on the third insulating film;
etching the first, second, and third insulating films anisotropically through the opening of the photoresist; removing the photoresist; and heat-treating the third insulation film at the edge of the opening. 1. A method for manufacturing a semiconductor device, comprising the step of making a film sloppy. (2) The method for manufacturing a semiconductor device according to claim (1), wherein the third thin insulating film is a glass film containing boron phosphorus.