JPS6190376U - - Google Patents
Info
- Publication number
- JPS6190376U JPS6190376U JP17484684U JP17484684U JPS6190376U JP S6190376 U JPS6190376 U JP S6190376U JP 17484684 U JP17484684 U JP 17484684U JP 17484684 U JP17484684 U JP 17484684U JP S6190376 U JPS6190376 U JP S6190376U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output signal
- emphasis
- character image
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims 3
- 230000001934 delay Effects 0.000 claims 1
- 239000000284 extract Substances 0.000 claims 1
- 230000001960 triggered effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Picture Signal Circuits (AREA)
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案の文字画像再生回路のブロツク
図、第２図は文字画像の記録前の輝度信号波形を
表わす図、第３図は第１図の各ブロツク間の信号
状態を表わすタイミングチヤート、第４図は従来
回路のブロツク図である。
１…デイエンフアシス回路、２…サンプルホー
ルド回路、３…ハイパスフイルター、８…信号処
理回路、ｂ…再生輝度信号、ｈ…整形輝度信号。
Fig. 1 is a block diagram of the character image reproducing circuit of the present invention, Fig. 2 is a diagram showing the luminance signal waveform before recording a character image, and Fig. 3 is a timing chart showing the signal state between each block in Fig. 1. , FIG. 4 is a block diagram of a conventional circuit. DESCRIPTION OF SYMBOLS 1... Day emphasis circuit, 2... Sample hold circuit, 3... High pass filter, 8... Signal processing circuit, b... Reproduction luminance signal, h... Shaped luminance signal.
Claims (1)
字画像の輝度信号を再生して画像表示するべく前
記輝度信号ｂの高域成分を減衰せしめるデイエン
ワアシス回路１を具えた文字画像再生回路に於い
て、デイエンフアシス回路１へ入力すべき輝度信
号ｂの高周波成分を抽出するハイパスフイルター
３と、該ハイパスフイルターの出力信号ｃを所定
時間遅延せしめる遅延回路４と、該遅延回路の出
力信号ｄの指令によつて前記デイエンフアシス回
路１の出力信号ｆを一定時間内にサンプリングし
て該サンプリングレベルを維持すると共に前記サ
ンプリング時間中は出力レベルをゼロに落とす信
号処理回路８とを具えたことを特徴とする文字画
像再生回路。 信号処理回路は、デイエンフアシス回路１の
出力信号ｆが入力されるサンプルホールド回路２
と、遅延回路４の出力信号ｄによつてトリガーさ
れ前記サンプルホールド回路２を制御するモノマ
ルチバイブレータ５と、サンプルホールド回路２
のサンプリング時間中該回路からの出力信号ｇを
遮断するスイツチ回路７とからなる実用新案登録
請求の範囲第１項に記載の文字画像再生回路。[Claims for Utility Model Registration] A day-enwasis circuit 1 is provided that attenuates the high-frequency components of the luminance signal b in order to reproduce the luminance signal of a character image recorded on a recording medium with emphasis on the high-frequency components and display the image. In the character image reproducing circuit, a high-pass filter 3 extracts a high frequency component of a luminance signal b to be input to the de-emphasis circuit 1, a delay circuit 4 delays an output signal c of the high-pass filter for a predetermined time, and the delay circuit a signal processing circuit 8 which samples the output signal f of the de-emphasis circuit 1 within a certain period of time according to the command of the output signal d of the de-emphasis circuit 1, maintains the sampling level, and reduces the output level to zero during the sampling period. A character image reproduction circuit characterized by: The signal processing circuit includes a sample hold circuit 2 into which the output signal f of the de-emphasis circuit 1 is input.
, a mono multivibrator 5 that is triggered by the output signal d of the delay circuit 4 and controls the sample and hold circuit 2, and a sample and hold circuit 2.
2. A character image reproducing circuit according to claim 1, which is a utility model, and comprises a switch circuit 7 which cuts off the output signal g from the circuit during the sampling time of .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17484684U JPS6190376U (en) | 1984-11-16 | 1984-11-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17484684U JPS6190376U (en) | 1984-11-16 | 1984-11-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6190376U true JPS6190376U (en) | 1986-06-12 |
Family
ID=30732452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17484684U Pending JPS6190376U (en) | 1984-11-16 | 1984-11-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6190376U (en) |
-
1984
- 1984-11-16 JP JP17484684U patent/JPS6190376U/ja active Pending
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