JPS621274U - - Google Patents
Info
- Publication number
- JPS621274U JPS621274U JP8891685U JP8891685U JPS621274U JP S621274 U JPS621274 U JP S621274U JP 8891685 U JP8891685 U JP 8891685U JP 8891685 U JP8891685 U JP 8891685U JP S621274 U JPS621274 U JP S621274U
- Authority
- JP
- Japan
- Prior art keywords
- resource
- processors
- control circuit
- permission signal
- permission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
- 238000013475 authorization Methods 0.000 description 1
Landscapes
- Multi Processors (AREA)
Description
第１図は本考案の共有資源競合制御回路の一実
施例を示すブロツク図、第２図は第１図における
調停制御回路の論理回路の実施例回路図である。
１…共有メモリ、２１〜２Ｎ…プロセツサ、３
１〜３Ｎ…調停制御回路、４１〜４Ｎ〜信号切替
回路、１０１〜１０Ｎ…資源使用要求信号、１１
１〜１１Ｎ…使用認可信号、１４，１４１〜１４
Ｎ…資源要求信号、１５，１５１〜１５Ｎ…許可
受付信号。
FIG. 1 is a block diagram showing an embodiment of the shared resource contention control circuit of the present invention, and FIG. 2 is a circuit diagram of an embodiment of the logic circuit of the arbitration control circuit in FIG. 1...Shared memory, 21-2N...Processor, 3
1-3N...arbitration control circuit, 41-4N-signal switching circuit, 101-10N...resource use request signal, 11
1~11N...Use authorization signal, 14,141~14
N...Resource request signal, 15,151-15N...Permission acceptance signal.
Claims (1)
資源を非同期で使用するシステムにおいて、前記
資源の非要求時は入力した資源許可信号を許可信
号出力端子に出力し、資源要求時は前記資源許可
信号入力により許可受付信号を出力すると共に前
記許可信号出力端子に使用禁止信号を出力して他
プロセツサの資源使用を禁止する機能を有する調
停制御回路を前記複数のプロセツサが個々に持ち
、前記複数プロセツサの調停制御回路から出力さ
れる資源要求信号を結合して前記複数プロセツサ
の任意の１台に調停制御回路の資源許可信号とし
て入力し、該プロセツサ以外はそれぞれ他プロセ
ツサの調停制御回路の許可信号出力端子の信号を
資源許可信号として入力することにより、前記複
数プロセツサの接続順に資源使用許可を与えるこ
とを特徴とする共有資源競合制御回路。 In a system in which a plurality of mutually independent processors use the same information resource asynchronously, when the resource is not requested, the input resource permission signal is output to the permission signal output terminal, and when the resource is requested, the input resource permission signal is input. Each of the plurality of processors has an arbitration control circuit having a function of outputting a permission acceptance signal and outputting a use prohibition signal to the permission signal output terminal to prohibit the use of resources of other processors. The resource request signals output from the control circuit are combined and inputted to any one of the plurality of processors as a resource permission signal of the arbitration control circuit, and the processors other than the processor input the permission signal output terminal of the arbitration control circuit of each other processor. A shared resource contention control circuit characterized in that by inputting a signal as a resource permission signal, resource use permission is given to the plurality of processors in the order in which they are connected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8891685U JPS621274U (en) | 1985-06-14 | 1985-06-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8891685U JPS621274U (en) | 1985-06-14 | 1985-06-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS621274U true JPS621274U (en) | 1987-01-07 |
Family
ID=30642514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8891685U Pending JPS621274U (en) | 1985-06-14 | 1985-06-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS621274U (en) |
-
1985
- 1985-06-14 JP JP8891685U patent/JPS621274U/ja active Pending
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