JPS62141696A - バイポーラｒａｍセル - Google Patents

バイポーラｒａｍセル

Info

Publication number: JPS62141696A
Authority: JP; Japan
Prior art keywords: transistors; transistor; base; emitter; current
Prior art date: 1985-12-16
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

JP61299771A

Other languages

English (en)

Japanese (ja)

Other versions

JPH0421279B2 (2

Inventor

マーク・エス・ビリテラ

ジエイムス・ジエイ・ステイパナツク

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Motorola Solutions Inc

Original Assignee

Motorola Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1985-12-16

Filing date

1986-12-16

Publication date

1987-06-25

1986-12-16 Application filed by Motorola Inc filed Critical Motorola Inc

1987-06-25 Publication of JPS62141696A publication Critical patent/JPS62141696A/ja

1992-04-09 Publication of JPH0421279B2 publication Critical patent/JPH0421279B2/ja

Status Granted legal-status Critical Current

Links

229920006395 saturated elastomer Polymers 0.000 description 3
238000009825 accumulation Methods 0.000 description 2
230000007423 decrease Effects 0.000 description 1
238000010586 diagram Methods 0.000 description 1
230000036039 immunity Effects 0.000 description 1
230000003071 parasitic effect Effects 0.000 description 1
238000011084 recovery Methods 0.000 description 1

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Computer Hardware Design (AREA)
Static Random-Access Memory (AREA)

JP61299771A 1985-12-16 1986-12-16 バイポーラｒａｍセル Granted JPS62141696A (ja)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US06/809,551 US4697251A (en)	1985-12-16	1985-12-16	Bipolar RAM cell
US809551		1985-12-16

Publications (2)

Publication Number	Publication Date
JPS62141696A true JPS62141696A (ja)	1987-06-25
JPH0421279B2 JPH0421279B2 (2)	1992-04-09

Family

ID=25201599

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP61299771A Granted JPS62141696A (ja)	1985-12-16	1986-12-16	バイポーラｒａｍセル

Country Status (2)

Country	Link
US (1)	US4697251A (2)
JP (1)	JPS62141696A (2)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4964081A (en) *	1989-08-11	1990-10-16	Cray Research, Inc.	Read-while-write ram cell
US5117391A (en) *	1990-06-04	1992-05-26	Motorola, Inc.	Bipolar memory cell array biasing technique with forward active PNP load cell
US8352400B2 (en)	1991-12-23	2013-01-08	Hoffberg Steven M	Adaptive pattern recognition based controller apparatus and method and human-factored interface therefore
US10361802B1 (en)	1999-02-01	2019-07-23	Blanding Hovenweep, Llc	Adaptive pattern recognition based control system and method
US7904187B2 (en)	1999-02-01	2011-03-08	Hoffberg Steven M	Internet appliance system and method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5798189A (en) *	1980-11-26	1982-06-18	Ibm	Multiplex address specifiable memory device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4125877A (en) *	1976-11-26	1978-11-14	Motorola, Inc.	Dual port random access memory storage cell
JPS5665395A (en) *	1979-10-30	1981-06-03	Fujitsu Ltd	Bit-line voltage level setting circuit

1985
- 1985-12-16 US US06/809,551 patent/US4697251A/en not_active Expired - Fee Related
1986
- 1986-12-16 JP JP61299771A patent/JPS62141696A/ja active Granted

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5798189A (en) *	1980-11-26	1982-06-18	Ibm	Multiplex address specifiable memory device

Also Published As

Publication number	Publication date
JPH0421279B2 (2)	1992-04-09
US4697251A (en)	1987-09-29

Publication	Publication Date	Title
US4322820A (en)	1982-03-30	Semiconductor integrated circuit device
US4792923A (en)	1988-12-20	Bipolar semiconductor memory device with double word lines structure
US4464735A (en)	1984-08-07	Semiconductor memory
US4442509A (en)	1984-04-10	Bit line powered translinear memory cell
JPH0345478B2 (2)	1991-07-11
JPS62141696A (ja)	1987-06-25	バイポーラｒａｍセル
US4280197A (en)	1981-07-21	Multiple access store
EP0418794B1 (en)	1995-12-06	Semiconductor memory device
EP0365730A1 (en)	1990-05-02	Double stage bipolar sense amplifier for BICMOS SRAMS with a common base amplifier in the final stage
US4298961A (en)	1981-11-03	Bipolar memory circuit
US3821719A (en)	1974-06-28	Semiconductor memory
US4745580A (en)	1988-05-17	Variable clamped memory cell
US4456979A (en)	1984-06-26	Static semiconductor memory device
US4701882A (en)	1987-10-20	Bipolar RAM cell
US4922411A (en)	1990-05-01	Memory cell circuit with supplemental current
US4570238A (en)	1986-02-11	Selectable write current source for bipolar rams
US4899311A (en)	1990-02-06	Clamping sense amplifier for bipolar ram
US4703458A (en)	1987-10-27	Circuit for writing bipolar memory cells
JPH0247037B2 (2)	1990-10-18
US4730277A (en)	1988-03-08	Circuit for biasing row of memory cells
JPH0241112B2 (2)	1990-09-14
JPS6079772A (ja)	1985-05-07	半導体記憶装置
JPH06325577A (ja)	1994-11-25	半導体記憶装置
JPH0318273B2 (2)	1991-03-12
JPS60251597A (ja)	1985-12-12	半導体メモリセル