JPS6214689Y2 - - Google Patents

Info

Publication number
JPS6214689Y2
JPS6214689Y2 JP1984004773U JP477384U JPS6214689Y2 JP S6214689 Y2 JPS6214689 Y2 JP S6214689Y2 JP 1984004773 U JP1984004773 U JP 1984004773U JP 477384 U JP477384 U JP 477384U JP S6214689 Y2 JPS6214689 Y2 JP S6214689Y2
Authority
JP
Japan
Prior art keywords
bonding
power
bonding pad
semiconductor
bonding pads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1984004773U
Other languages
English (en)
Japanese (ja)
Other versions
JPS59128736U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984004773U priority Critical patent/JPS59128736U/ja
Publication of JPS59128736U publication Critical patent/JPS59128736U/ja
Application granted granted Critical
Publication of JPS6214689Y2 publication Critical patent/JPS6214689Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
JP1984004773U 1984-01-17 1984-01-17 半導体集積回路装置 Granted JPS59128736U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984004773U JPS59128736U (ja) 1984-01-17 1984-01-17 半導体集積回路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984004773U JPS59128736U (ja) 1984-01-17 1984-01-17 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS59128736U JPS59128736U (ja) 1984-08-30
JPS6214689Y2 true JPS6214689Y2 (2) 1987-04-15

Family

ID=30136373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984004773U Granted JPS59128736U (ja) 1984-01-17 1984-01-17 半導体集積回路装置

Country Status (1)

Country Link
JP (1) JPS59128736U (2)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0214307B1 (en) * 1985-02-28 1991-07-17 Sony Corporation Semiconducteur circuit device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49131381U (2) * 1973-03-14 1974-11-12
JPS5218096B2 (2) * 1973-04-18 1977-05-19
DE2528119A1 (de) * 1975-06-24 1977-01-20 Siemens Ag Elektrisch leitendes band

Also Published As

Publication number Publication date
JPS59128736U (ja) 1984-08-30

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