JPS62165384A - Manufacture of semiconductor light emitting device - Google Patents

Manufacture of semiconductor light emitting device

Info

Publication number
JPS62165384A
JPS62165384A JP61006754A JP675486A JPS62165384A JP S62165384 A JPS62165384 A JP S62165384A JP 61006754 A JP61006754 A JP 61006754A JP 675486 A JP675486 A JP 675486A JP S62165384 A JPS62165384 A JP S62165384A
Authority
JP
Japan
Prior art keywords
active layer
mesa structure
layer
mask
hydrogen peroxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61006754A
Other languages
Japanese (ja)
Other versions
JPH0213470B2 (en
Inventor
Toshihiro Kusuki
楠木 敏弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP61006754A priority Critical patent/JPS62165384A/en
Publication of JPS62165384A publication Critical patent/JPS62165384A/en
Publication of JPH0213470B2 publication Critical patent/JPH0213470B2/ja
Granted legal-status Critical Current

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  • Led Devices (AREA)
  • Weting (AREA)
  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To suppress a leakage current and facilitate reduction of the threshold current of a laser by employing mixed solution of hydrogen bromide, hydrogen peroxide and water or mixed solution of hydrogen bromide, hydrogen peroxide and acetic acid as etchant. CONSTITUTION:An N-type InP buffer layer 2, an InGaAsP active layer 3 and a P-type InP cladding layer 4 are deposited over the whole surface of an N-type InP substrate 1. Then, after an SiO2 mask 11 is formed on the top surface of a region where a mesa structure 5 is to be formed, mixed solution of 20cc of water or acetic acid 4cc (47wt%) of hydrogen bromide and 2cc (31wt%) of hydrogen peroxide is employed for etching both sides of the mask 11 until the active layer 3 is exposed on both sides to form the mesa structure 5. Side surfaces where a (111)A face does not exist are formed under a constricted part of the mesa structure 5, in other words on the sides where the side surface of the active layer 3 are exposed. Then current blocking layers 6 and 7 are deposited. After the mask 11 is removed, insulating layers 8 and electrodes 9 and 10 are formed and the device is completed by cleaving.

Description

【発明の詳細な説明】 〔概要) インジウム燐系半導体を用いダブルヘテロ接合をなず活
性層を帯状のメサ構造にする埋込み形半導体発光装置の
製造において、 メサ構造を形成するエツチングのエツチング液に、臭化
水素と過酸化水素と水との混合液またはり、化水素と過
酸化水素と酢酸との混合液を使用することにより、 活性層の側面が(111)A面にならないようにしたも
のである。
[Detailed Description of the Invention] [Summary] In the manufacture of a buried semiconductor light emitting device using an indium phosphorous semiconductor and having an active layer with a band-shaped mesa structure without a double heterojunction, an etching solution used in etching to form the mesa structure is used. By using a mixture of hydrogen bromide, hydrogen peroxide, and water, or a mixture of hydrogen chloride, hydrogen peroxide, and acetic acid, the side surface of the active layer was prevented from becoming the (111) A side. It is something.

〔産業上の利用分野〕[Industrial application field]

本発明は、インジウム燐系半導体を用いダブルヘテロ接
合をなす活+l1層を帯状のメサ構造にする埋込み形半
導体発光装置の製造方法に係り、特に、そのメサ構造の
製造方法に関す。
The present invention relates to a method of manufacturing an embedded semiconductor light emitting device in which an active +l1 layer forming a double heterojunction is formed into a band-shaped mesa structure using an indium phosphorus semiconductor, and particularly relates to a method of manufacturing the mesa structure.

十記に頬する半導体発光装置には、例えばBH(Bur
ied Heterostructure)レーザなど
がある。
For example, there are many semiconductor light emitting devices such as BH (Bur
ied Heterostructure) laser, etc.

そしてBHレーザの類のレーザは、発振しきい値電流が
比較的小さい特徴から光通信などの光信号源として用い
られるが、発振しきい値電流の一層の低減が望まれてい
る。
Lasers such as BH lasers are used as optical signal sources for optical communication and the like because of their relatively small oscillation threshold current, but it is desired to further reduce the oscillation threshold current.

〔従来の技術〕[Conventional technology]

第3図はBHレーザの構成側断面図である。 FIG. 3 is a sectional side view of the configuration of the BH laser.

同図において、1はn型インジウム燐(lnP)の基板
、2はn型1nPのバッファ層、3は発光fi域となる
インジウムガリウム砒素燐(InGaAsP)の活性層
、4はp型1nPのクララ1酬、5はクラッド層4と活
性層3とバッファN2とで形成する帯状(図面に垂直な
方向が長手方向になる)のメサ構造、6はp型1nPの
電流1目+L層、7はn型1nPの電流■1ト屓、8は
二酸化シリコン(Si02)の絶縁層、9と10は金属
の電極である。
In the figure, 1 is an n-type indium phosphide (lnP) substrate, 2 is an n-type 1nP buffer layer, 3 is an indium gallium arsenide phosphide (InGaAsP) active layer which becomes the emission fi region, and 4 is a p-type 1nP clarifier. 1, 5 is a strip-shaped mesa structure (the longitudinal direction is perpendicular to the drawing) formed by the cladding layer 4, active layer 3, and buffer N2, 6 is a p-type 1nP current 1+L layer, and 7 is a mesa structure. 8 is an insulating layer of silicon dioxide (Si02), and 9 and 10 are metal electrodes.

このレーザは、メサ構造5において活性層3がダブルヘ
テロ接合をなし、電極9から電極10に向けて電流を流
すと、電流ド目1F屓6および7の間で形成する逆方向
P−N接合と、電流l止層6およびバッファ層2の間で
形成し活性層3部より立ち上がり電圧が高くなる順方向
P−N接合の存在により、電流が活性層3に集中する。
In this laser, the active layer 3 forms a double heterojunction in the mesa structure 5, and when a current is passed from the electrode 9 to the electrode 10, a reverse P-N junction is formed between the current gate 1F bottom 6 and 7. The current is concentrated in the active layer 3 due to the presence of a forward P-N junction formed between the current stop layer 6 and the buffer layer 2 and having a rising voltage higher than that of the active layer 3.

そしζその電流を成る値(発振しきい値電流)以トに大
きく′1−ると、レーザ発振を起こし活性層3からレー
ザ光を発すこのレーザの従来の製造方法は第4図のr程
順例所面図(al〜IcIの如くである。
If the current is increased to a value greater than the value (oscillation threshold current) '1-, laser oscillation occurs and laser light is emitted from the active layer 3.The conventional manufacturing method of this laser is as shown in Fig. 4 (r). Top view (al to IcI).

即ちr図(a)参照〕、基板l十全面に、バッファ層2
、活性層3、クラッド層4、を例えば液相成長法で堆積
する。
That is, see Figure (a)], a buffer layer 2 is formed on the entire surface of the substrate 1.
, an active layer 3, and a cladding layer 4 are deposited by, for example, a liquid phase growth method.

次いで〔図fb)参照〕、上面のメサ構造5形成領域に
5iQ2のマスク11を形成した後、臭素(Brz )
とメタノール(CH3011)とのl捏合Sをエツチン
グ液にして活性層3が側面に表出するまでエツチングし
メサ構造5を形成する。
Next [see Figure fb], after forming a 5iQ2 mask 11 in the mesa structure 5 formation region on the upper surface, bromine (Brz) was applied.
The mesa structure 5 is formed by etching the active layer 3 using a mixture S of 1 and methanol (CH3011) as an etching solution until the active layer 3 is exposed on the side surface.

次いで〔図(C1参照〕、マスク11をそのままにして
例えば液相成長法により電流17■、+l−屓6および
7を堆積する。
Next, as shown in FIG. 1 (see C1), currents 17 and +1-layers 6 and 7 are deposited by, for example, liquid phase growth while leaving the mask 11 as it is.

次いで〔第3図参照〕、マスク11を除去した後、絶縁
層8、電極9およびIOを形成し襞間して完成する。
Next [see FIG. 3], after removing the mask 11, the insulating layer 8, electrodes 9 and IO are formed and folded to complete the process.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このように製造されたB Hレーザは、メサ構造5がi
チメサ状になり、その側面が熱損傷を受は易い(III
)A而になっている。また、先に述べたエツチング液で
エツチングされたバッファ層2の而にはビットが発生ず
るため、電ff、l1ti +)−屓6をjiff積し
た際に図(elに示す如く未成長部分12が/1:する
The BH laser manufactured in this way has a mesa structure 5 of i
It becomes chimesa-shaped, and its sides are easily susceptible to heat damage (III
) It has become A. In addition, since bits are generated in the buffer layer 2 etched with the etching solution mentioned above, when the electric current ff, l1ti +) - layer 6 is multiplied by jiff, the ungrown portion 12 as shown in FIG. ga/1: Yes.

このため電流を流した際に、図(C1に示す如く、活性
層3に集中すべき電流の一部が漏れ電流1゜およびI2
となって発光に寄与しなくなり、発振しきい(11V電
流が大きくなる問題がある。
For this reason, when a current is applied, a portion of the current that should be concentrated in the active layer 3 becomes the leakage current 1° and I2 as shown in Figure (C1).
Therefore, it no longer contributes to light emission, and there is a problem that the oscillation threshold (11V current increases).

c問題点を解決するための手段〕 L記問題点は、インジウム(In)を含むm−v族混晶
からなりInP燐結晶またはInと燐(P)を4部成分
にするIII −V族混晶に接してダブルヘテロ接合を
形成し発光領域となる活性層が、半導体基板]−に設け
られて多層構造をなす半導体板を用い、その上面にマス
クを設はエツチングして該活性層が含まれる帯状のメサ
構造を形成するに際して、該エツチングのエツチング液
として、臭化水素(HRr)と過酸化水素(I2 o2
)  と水(I20)との混合液およびI(BrとH2
O2と酢酸(CH3co2H)との混合液の中の何れか
一方を用いる本発明の製造方法によって解決される。
Means for Solving Problem C] The problem described in L is InP phosphorus crystal consisting of m-v group mixed crystal containing indium (In) or III-V group consisting of In and phosphorus (P) as four-part components. A semiconductor plate having a multilayer structure is used, in which an active layer which forms a double heterojunction in contact with a mixed crystal and becomes a light emitting region is provided on a semiconductor substrate. Hydrogen bromide (HRr) and hydrogen peroxide (I2 o2
) and water (I20) and I (Br and H2
This problem is solved by the production method of the present invention, which uses either one of the mixed liquids of O2 and acetic acid (CH3co2H).

〔作用〕[Effect]

ト記二ff類のエツチング液は、第4図(blに示した
メサ構造5を形成するエツチングの際にその側面が(1
11)A面にならないようにし、ηつ第4図に示したピ
ット12が発生しないようにするものとして、本願発明
者が多くの経験を通して見いだしたものである。
The etching solution of type 2ff is used when the side surface is (1) during etching to form the mesa structure 5 shown in
11) This is something that the inventor of the present application has discovered through much experience as a means to prevent the formation of the A-side and to prevent the occurrence of the pits 12 shown in FIG. 4.

そしてこのエツチング液の十記作用は、第3図における
活性層3の材料がInを含むI[I−V族混晶であり、
バッファ層2およびクラッド層4の材料がInP結晶ま
たはInとPを主成分にするm−v族混晶である場合を
包含する。
The ten effects of this etching solution are such that the material of the active layer 3 in FIG. 3 is an I[IV group mixed crystal containing In,
This includes the case where the material of the buffer layer 2 and the cladding layer 4 is an InP crystal or an m-v group mixed crystal containing In and P as main components.

従って上記二種類のエツチング液の何れか一方を用いて
第4図(b)で説明したエツチングを行えば、形成され
たメサ構造5の側面は(111)へ面になることを回避
することが出来、また第4図(C1で説明した電流11
ti +l−屓6の堆積において未成長部分12の発生
を回避することが出来る。
Therefore, if the etching described in FIG. 4(b) is performed using either of the above two types of etching solutions, the side surfaces of the formed mesa structure 5 can be avoided from becoming (111) planes. Also, the current 11 explained in Figure 4 (C1)
It is possible to avoid the generation of ungrown portions 12 in the deposition of ti +l- layers 6.

このことは先に述べた漏れ電流■1および12の発生を
抑え、当該レーザのしきい値電流を低減させるごとに繋
がる。
This suppresses the occurrence of the leakage currents (1) and (12) mentioned above, and leads to a reduction in the threshold current of the laser.

〔実施例〕〔Example〕

以下4発明ブJ法の実施例について第1図および第2図
を用い説明する。
Examples of the 4-invention method will be described below with reference to FIGS. 1 and 2.

第1図は本発明第一の実施例の「程順側断面図+al〜
+c+、第2図は同しく第二の実施例の]゛、稈順側断
面図(al〜F01、であり、各fat〜(C1は従来
方法をネオ第4図の(al〜fclに対応している。ま
た全図を通し同一符号は同−材料同一機能の対象物を示
す。
FIG. 1 is a sectional side view of the first embodiment of the present invention.
+c+, Fig. 2 is a culm forward side sectional view (al~F01) of the second embodiment, and each fat~ (C1 corresponds to (al~fcl) of the conventional method in Fig. 4). Also, the same reference numerals throughout the drawings indicate objects with the same material and the same function.

第1図に示す実施例によるレーザの製造は以−トの如く
である。
The manufacturing of the laser according to the embodiment shown in FIG. 1 is as follows.

即ち〔図ta+参照J、従来方法と同様にしてn型In
l’基板11−全面に、n型1nPバツフア屓2、In
GaAsP活個屓3、p型1nPクラソFI’pt4、
をtit積する。バッファ層2、活性層3、クラット層
4の厚さは、それぞれ例えば、約2μm、約0.15μ
m、約1.5μm1である。
That is, [see Figure ta+J, n-type In
l' substrate 11 - n-type 1nP buffer layer 2, In
GaAsP active individual 3, p-type 1nP Kuraso FI'pt4,
Tit product. The thicknesses of the buffer layer 2, active layer 3, and crat layer 4 are, for example, approximately 2 μm and approximately 0.15 μm, respectively.
m, approximately 1.5 μm1.

次いで〔図fb)参照〕、ヒ面のメサ構造5形成領域に
5i02マスク11を形成した後、水または酢酸20c
c 、臭化水素(47れ%)  4cc、過酸化水素水
(31れ%)2cc、の混合液を用いて、活性層3が側
面に表出するまでマスク11の両側をエツチングし、図
示形状のメサ構造5を形成する。メサ構造5の寸法は、
例えば各層の上記厚さに対して、マスク11の幅を約3
μm、エツチング深さを約1.8μmにした場合、頂上
部の幅が約1.5μm、クラットN4におけるくびれ部
の幅が約0.8μm、活性層3の幅が約1.5μm、で
ある。そしてメサ構造5の1−記くびれ部より下側即ち
活性N3の側面が表出する側には(111)A面の存在
しない側面が形成される。
Next, [see Figure fb)], after forming a 5i02 mask 11 in the mesa structure 5 formation region of the A surface, water or acetic acid 20c
c. Using a mixed solution of 4 cc of hydrogen bromide (47%) and 2 cc of hydrogen peroxide solution (31%), both sides of the mask 11 are etched until the active layer 3 is exposed on the sides, forming the shape shown in the figure. A mesa structure 5 is formed. The dimensions of mesa structure 5 are:
For example, for the above thickness of each layer, the width of the mask 11 is about 3
μm, and when the etching depth is approximately 1.8 μm, the width of the top portion is approximately 1.5 μm, the width of the constriction of the crat N4 is approximately 0.8 μm, and the width of the active layer 3 is approximately 1.5 μm. . A side surface where the (111) A plane does not exist is formed below the constriction section 1- of the mesa structure 5, that is, on the side where the side surface of the active N3 is exposed.

次いでc図fcl参照〕、従来方法と同様にして電?*
m+F屓6および7を堆積する。この場合、従来方法で
生じた未成長部分12の発生は起こらない。
Next, refer to Figure c fcl]. *
Deposit m+F layers 6 and 7. In this case, the ungrown portion 12 that occurs in the conventional method does not occur.

次いで〔第3図参照〕、従来方法と同様に、マスク11
を除去した後、絶縁層8、電極9および10を形成し襞
間して完成する。
Next [see FIG. 3], as in the conventional method, the mask 11 is
After removing, an insulating layer 8, electrodes 9 and 10 are formed and folded to complete the process.

かく製造されたレーザは、先に述べた漏れ電流1、およ
び12の発生が抑えられ、発振しきい値電流が、従来方
法により活性層3を略同−寸法に製造されたレーザの約
1/2に低減した。
In the thus manufactured laser, the occurrence of the leakage currents 1 and 12 described above is suppressed, and the oscillation threshold current is approximately 1/1 of that of a laser manufactured by the conventional method with the active layer 3 having approximately the same dimensions. It was reduced to 2.

第2図に示す実施例によるレーザの製造は、第1図1b
1図示の5102マスク11をレジスト (A Z)の
マスクllaに替え同一のエツチング液を使用してメサ
構造5を形成し、マスクllaを除去した後、第2図t
e1図示の如く電流阻止層6および7とp型TnPのキ
ャンプ層】3とを11を積するものである。この場合は
、第1図1b1に示す如(、メサ構造5の頂上部の幅が
第一の実施例の場合より小さくなっ′ζクラッド層4に
おけるくびれが消失し、全面に渡り(Ill)A面の存
在しない側面が形成される。そ17て発振しきい値電流
が低減するのは第一の実施例と同様である。
The fabrication of the laser according to the embodiment shown in FIG.
The mesa structure 5 is formed using the same etching solution by replacing the 5102 mask 11 shown in FIG.
e1 As shown in the figure, current blocking layers 6 and 7 and a p-type TnP camp layer 3 are laminated in a layer 11. In this case, as shown in FIG. 1b1, the width of the top of the mesa structure 5 is smaller than that of the first embodiment, the constriction in the cladding layer 4 disappears, and (Ill) A side surface without a surface is formed, and the oscillation threshold current is reduced as in the first embodiment.

また図示はないが、クラット層4のトに、厚さ0.1,
11111程度のInGaAsP層を設ければ、5i(
12マスク]1を使用しても第二の実施例と同様なメサ
構造5を形成することが出来る。
Although not shown, the thickness of the crat layer 4 is 0.1,
If an InGaAsP layer of about 11111 is provided, 5i(
12 masks] 1, it is possible to form a mesa structure 5 similar to that of the second embodiment.

なお−ト記実施例では、バッファ層2、活性層3、クラ
ッド層4の材料を特定しているが、活性層3の材料がI
nを含む■−■族混晶であり、バッファ層2およびクラ
ット層4のそれぞれの材料がInPまたはInとPを主
成分にするm−v族混晶であるならば、実施例と同一の
エツチング液を使用して実施例と同様なメサ構造5を形
成することが出来る。
Note that in the embodiment described above, the materials of the buffer layer 2, active layer 3, and cladding layer 4 are specified, but the material of the active layer 3 is
If the buffer layer 2 and the cladding layer 4 are each made of InP or an m-v group mixed crystal containing In and P as main components, the same method as in the embodiment is applied. A mesa structure 5 similar to that of the embodiment can be formed using an etching solution.

また上記実施例はBHレーザを例にして示したが、上記
材料を用いダブルヘテロ接合をなす活性層3がメサ構造
5に設けられる埋込み形半導体発光装置であるならば、
本発明の構成が有効であることは容易に類推可能である
Furthermore, although the above embodiment has been shown using a BH laser as an example, if the active layer 3 forming a double heterojunction using the above material is provided in the mesa structure 5, it is a buried type semiconductor light emitting device.
It can be easily inferred that the configuration of the present invention is effective.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の構成によれば、インジウム
燐系半導体を用いダブルヘテロ接合をなす活性層を帯状
のメサ構造に有する埋込み形半導体発光装置の製造にお
いて、活性層の側面が(111)A面にならないように
することが出来て、例えばB Hレーザの発振しきい値
組流を低減させる効果がある。
As explained above, according to the configuration of the present invention, in manufacturing an embedded semiconductor light emitting device having an active layer forming a double heterojunction in a band-shaped mesa structure using an indium phosphorus semiconductor, the side surface of the active layer is (111). It can be prevented from becoming the A-plane, and has the effect of reducing the oscillation threshold current of a BH laser, for example.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明第一の実施例の工程順側断面図(al〜
IC1、 第2図は本発明第二の実施例の工程順側断面図(al〜
tel、 第3図はBHレーザ例の模式側所間図、第4図は第3図
図示レーザの従来の製造方法を承ず工程順側断面図1a
)〜fc)、 である。 図において、 1は基板、 2はハソファ層、 3は活性層、 4はクラッド層、 5はメサ構造、 6.7は電流阻止層、 8は絶縁層、 9、IOは電極、 11、llaはマスク、 12は未成長部分、 13はキャンプ層、 11、■2は漏れ電流、 である。 第3@図示レーザ゛の
FIG. 1 is a side cross-sectional view of the first embodiment of the present invention (al~
IC1, FIG. 2 is a side cross-sectional view of the second embodiment of the present invention (al~
tel, Fig. 3 is a schematic side view of an example of a BH laser, and Fig. 4 is a cross-sectional side view of the laser shown in Fig. 3 using the conventional manufacturing method.
) ~ fc), In the figure, 1 is the substrate, 2 is the haphazard layer, 3 is the active layer, 4 is the cladding layer, 5 is the mesa structure, 6.7 is the current blocking layer, 8 is the insulating layer, 9, IO is the electrode, 11, lla is the A mask, 12 is an ungrown portion, 13 is a camp layer, 11, and 2 are leakage currents. 3rd @Illustrated laser

Claims (1)

【特許請求の範囲】[Claims] インジウムを含むIII−V族混晶からなりインジウム燐
結晶またはインジウムと燐を主成分にするIII−V族混
晶に接してダブルヘテロ接合を形成し発光領域となる活
性層が、半導体基板上に設けられて多層構造をなす半導
体板を用い、その上面にマスクを設けエッチングして該
活性層が含まれる帯状のメサ構造を形成するに際して、
該エッチングのエッチング液として、臭化水素と過酸化
水素と水との混合液および臭化水素と過酸化水素と酢酸
との混合液の中の何れか一方を用いることを特徴とする
半導体発光装置の製造方法。
An active layer, which forms a double heterojunction in contact with an indium phosphorous crystal made of a III-V group mixed crystal containing indium or a III-V group mixed crystal whose main components are indium and phosphorus, and serves as a light emitting region, is formed on a semiconductor substrate. When forming a band-shaped mesa structure containing the active layer by using a semiconductor plate having a multilayer structure and etching a mask on the upper surface thereof,
A semiconductor light emitting device characterized in that, as an etching solution for the etching, one of a mixed solution of hydrogen bromide, hydrogen peroxide, and water and a mixed solution of hydrogen bromide, hydrogen peroxide, and acetic acid is used. manufacturing method.
JP61006754A 1986-01-16 1986-01-16 Manufacture of semiconductor light emitting device Granted JPS62165384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61006754A JPS62165384A (en) 1986-01-16 1986-01-16 Manufacture of semiconductor light emitting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61006754A JPS62165384A (en) 1986-01-16 1986-01-16 Manufacture of semiconductor light emitting device

Publications (2)

Publication Number Publication Date
JPS62165384A true JPS62165384A (en) 1987-07-21
JPH0213470B2 JPH0213470B2 (en) 1990-04-04

Family

ID=11646971

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61006754A Granted JPS62165384A (en) 1986-01-16 1986-01-16 Manufacture of semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JPS62165384A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015162500A (en) * 2014-02-26 2015-09-07 三菱電機株式会社 Manufacturing method of semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0641584U (en) * 1992-11-18 1994-06-03 方義 渡辺 Bath tub with stool

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015162500A (en) * 2014-02-26 2015-09-07 三菱電機株式会社 Manufacturing method of semiconductor device
US9153942B2 (en) 2014-02-26 2015-10-06 Mitsubishi Electric Corporation Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
JPH0213470B2 (en) 1990-04-04

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