JPS62201534U - - Google Patents
Info
- Publication number
- JPS62201534U JPS62201534U JP8921186U JP8921186U JPS62201534U JP S62201534 U JPS62201534 U JP S62201534U JP 8921186 U JP8921186 U JP 8921186U JP 8921186 U JP8921186 U JP 8921186U JP S62201534 U JPS62201534 U JP S62201534U
- Authority
- JP
- Japan
- Prior art keywords
- frequency divider
- divider circuit
- flip
- power supply
- flop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Description
第１図は本考案の一実施例の回路図、第２図は
ハイブリツド構成とした場合の平面配置図、第３
図はｆｍａｘのレベル依存性を示すグラフ、第４
図ａ，ｂは本考案回路のｆｍａｘの電圧依存性、
同図ｃは従来回路のｆｍａｘの電圧依存線性を夫
々示すグラフ、第５図は従来の回路図である。
１〜４……エミツタフオロワ部、５〜８……負
荷抵抗、１１……入力端子、１２ａ，１２ｂ……
出力端子、１３……電源端子、１３ａ……エミツ
タフオロワ駆動電源端子、１３ｂ……フリツプフ
ロツプ駆動電源端子、１４，１５……フリツプフ
ロツプ回路、１６，１７……差動増幅回路、２１
……ＴＯ８カンケース、２２……ヘツダ、２３…
…分周器集積回路チツプ、２５……入力信号ピン
、２６……出力信号ピン、２７，２８……５０Ω
線路ＭＩＣ基板、２９，３０……チツプコンデン
サ、３１，３２……電源接続ピン、３３……金属
ワイヤ。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is a plan layout diagram for a hybrid configuration, and Fig. 3 is a circuit diagram of an embodiment of the present invention.
The figure is a graph showing the level dependence of f max .
Figures a and b show the voltage dependence of f max of the circuit of the present invention,
FIG. 5c is a graph showing the voltage dependence linearity of f max in the conventional circuit, and FIG. 5 is a conventional circuit diagram. 1 to 4... Emitter follower section, 5 to 8... Load resistance, 11... Input terminal, 12a, 12b...
Output terminal, 13...Power supply terminal, 13a...Emitter follower drive power supply terminal, 13b...Flip-flop drive power supply terminal, 14, 15...Flip-flop circuit, 16, 17...Differential amplifier circuit, 21
...TO8 can case, 22...header, 23...
...Frequency divider integrated circuit chip, 25...Input signal pin, 26...Output signal pin, 27, 28...50Ω
Line MIC board, 29, 30... Chip capacitor, 31, 32... Power connection pin, 33... Metal wire.
Claims (1)
と、このフリツプフロツプの負荷として接続した
エミツタフオロワとで構成した分周器回路におい
て、前記フリツプフロツプ及びエミツタフオロワ
を駆動する電源端子を夫々別個に設け、これら電
源端子の印加電圧を独立して調整できるように構
成したことを特徴とする分周器回路。 (2) １／２分周器回路である実用新案登録請求
の範囲第１項記載の分周器回路。[Claims for Utility Model Registration] (1) In a frequency divider circuit composed of master and slave flip-flops and an emitter follower connected as a load of the flip-flop, the power supply terminals for driving the flip-flop and the emitter follower are connected separately. A frequency divider circuit characterized in that the frequency divider circuit is configured such that the voltage applied to these power supply terminals can be adjusted independently. (2) The frequency divider circuit according to claim 1, which is a 1/2 frequency divider circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8921186U JPH042506Y2 (en) | 1986-06-13 | 1986-06-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8921186U JPH042506Y2 (en) | 1986-06-13 | 1986-06-13 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62201534U true JPS62201534U (en) | 1987-12-22 |
| JPH042506Y2 JPH042506Y2 (en) | 1992-01-28 |
Family
ID=30947991
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8921186U Expired JPH042506Y2 (en) | 1986-06-13 | 1986-06-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH042506Y2 (en) |
-
1986
- 1986-06-13 JP JP8921186U patent/JPH042506Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH042506Y2 (en) | 1992-01-28 |
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