JPS6220635B2 - - Google Patents
Info
- Publication number
- JPS6220635B2 JPS6220635B2 JP54152841A JP15284179A JPS6220635B2 JP S6220635 B2 JPS6220635 B2 JP S6220635B2 JP 54152841 A JP54152841 A JP 54152841A JP 15284179 A JP15284179 A JP 15284179A JP S6220635 B2 JPS6220635 B2 JP S6220635B2
- Authority
- JP
- Japan
- Prior art keywords
- potential
- transistor
- memory cell
- load
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15284179A JPS5677988A (en) | 1979-11-26 | 1979-11-26 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15284179A JPS5677988A (en) | 1979-11-26 | 1979-11-26 | Semiconductor memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5677988A JPS5677988A (en) | 1981-06-26 |
| JPS6220635B2 true JPS6220635B2 (da) | 1987-05-08 |
Family
ID=15549295
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15284179A Granted JPS5677988A (en) | 1979-11-26 | 1979-11-26 | Semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5677988A (da) |
-
1979
- 1979-11-26 JP JP15284179A patent/JPS5677988A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5677988A (en) | 1981-06-26 |
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