JPS62215875A - Brightness setting circuit - Google Patents

Abstract

PURPOSE:To enable the digital setting of brightness, by reading position data from a memory means at the time interval set by an interval setting means and brightening the display point corresponding to the read position data. CONSTITUTION:At the time of display operation, the output TG of an interval setting circuit 11 is outputted from a change-over circuit 13 as a clock signal and supplied to a timing signal generating circuit 12 and an address counter 1. A memory 3 receives address indication on the basis of the count value of a counter 1, and X-axis and Y-axis data are read from the memory 3 by said address indication and latched to latch circuit 5, 6 by strobe signals LX, LY outputted from the circuit 12. The latch outputs of the circuits 5, 6 are outputted as ones for the X-axis and Y-axis of a cathode ray tube through D/A converters 9, 10. At the same time, a signal is outputted from the circuit 12 and the output of a NOR gate 15 comes to high potential to be applied to the cathode ray tube. Therefore, during a period when the output of the gate 15 is high potential, the point indicated by the outputs of the converters 9, 10 is brightened.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a brightness setting circuit for adjusting the brightness of a display other than a normal signal waveform in an oscilloscope.

(Prior art) In addition to the normal signal waveform on the tube surface of the oscilloscope,
2. Description of the Related Art So-called read-out occuloscopes and the like are known, which display characters and the like according to measured values.

In the present invention, the normal signal waveform refers to the waveform when an analog signal is directly input to an otsu cilloscope and displayed. This normal signal waveform and characters, etc. other than the normal signal waveform (in this specification, characters, etc. other than the normal signal waveform include characters, symbols, scales, data obtained by digitizing the waveform, etc.) are displayed as two sets. The brightness is set independently for each. At this time, the normal signal waveform is an analog signal, and characters other than the normal signal waveform are digital 1g numbers, but the brightness setting is performed at an analog level.

For example, you can set up two analog circuits, set the analog level for each, and switch the two circuits according to the timing when the normal signal waveform and characters other than the normal signal waveform are displayed. (Problem to be solved by the invention) However, when the above-mentioned change of convenience is used, characters such as ``f:''
In addition to difficult settings because the output timing of the display point for display is irregular, the period for displaying characters etc. is short and brightness may become uneven due to spikes for brightness switching. However, there was a problem that the display was blurry.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above problems and provide a brightness setting circuit that can digitally set brightness.

(Means for solving the problem) In the brightness setting circuit of the Otsu 70 Skogu, there is a storage means that stores in advance position data of each display point forming a display other than a normal signal waveform, and a storage means that stores the position data from the storage means. a readout means for reading, an interval setting means capable of setting and changing the readout time interval of the position data by the readout means, and converting the read position data into an analog signal and transmitting it to the oscilloscope as a deflection signal. A D/A conversion means is provided, and the brightness is set by brightening a designated display point in the D/A conversion means.

(Operation) In the present invention configured as described above, position data is read from the storage means at time intervals set by the interval setting means. This read position data is D/A
The converter converts the signal into an analog signal, which is then supplied to the oscilloscope as a deflection signal. Therefore, the display point is designated, and this designated display point is illuminated. As a result, the interval at which the display points are illuminated is set by the interval setting means, and by expanding or contracting this interval, the afterimage changes, and the luminance is substantially set corresponding to this interval.

(Example of the invention) The present invention will be explained below using examples.

FIG. 1 is a block diagram showing one embodiment of the present invention.

Is the address data from address counter 1 maltezorek? 2t- to memory 3 and address memory 3. On the other hand, address data is supplied from the microcomputer via the address buffer 4 to the multiplexer 2. The data read from memory 3 is supplied to data latch circuits 5 and 6 to be latched. Data from the microcomputer to the memory 3 or vice versa is supplied to the memory 3 via the tri-state data path patch 18, and the contents of the memory 3 can be written or read by access from the microcomputer. That's how it is.

The latte data of the data latch circuit 5 is supplied to the D/A converter 9 as its analog output signal for all X-axis deflection, and the latte data of the data latch circuit 6 is supplied to the D/A converter 10 and used as the analog output signal for all X-axis deflection. The analog output is supplied to the cathode ray tube as a Y-axis deflection signal.

On the other hand, in the memory 3, as schematically shown in FIG. 2, X-axis data and Y-axis body data corresponding to display point positions to be illuminated are stored, for example, at adjacent addresses.

Further, reference numeral 11 designates an interval setting circuit, which allows setting the interval between a pair of latch circuits 5 and 60 strobe signals and the next pair of strobe signals. An example of this is shown in FIG.
and 113, access tuple counter 14, or f
- gate 115, nand gate 11 and and gate 1
It consists of 17.

Further, the timing generation circuit 12 includes a switching circuit 1 to be described later.
A strobe signal Lx, which latches the X-axis data of the memory 3 into the data latch circuit 5 in response to the output signal T0 from the t-interval setting circuit 11, that is, the clock signal supplied to the address counter, and the corresponding Y Outputs the stroller signal LYt- which latches the shaft trunk data to the data latch circuit 6, and outputs the X-axis layer data Xi and the Y-axis circumferential data Y.
The nine circuits are designed to generate a timing signal U that lights up the display point when the display points i and i are aligned. An example of this is as shown in FIG. It is composed of. Timing signal U is supplied as one input to node f-15.

Reference numeral 13 denotes a switching circuit that switches the supply and cutoff of a clock signal (=TG) and the supply and cutoff of a read/write signal from the microcomputer (hereinafter referred to as "contrast signal") using an access signal (high potential) from the microcomputer. Therefore, during non-access, that is, when the access signal is at a low potential, the clock signal (=TG) and substantially the read signal (π signal) are selected.

The R/W signal outputted via the switching circuit 13 is supplied to the microcomputer, memory 3, and data bus buffer 8, so that writing and reading are performed using the π false signal. The access signal is supplied to the multiplexer 2, the data node 4 buffer 8, and the data node 15, and the access signal causes the multiplexer 2 to select the output signal from the bus node 4 buffer 4, thereby placing the data node 4 buffer 8 in a bidirectional conduction state. , and signal U
Regardless of the state of , the output of NOR (ff-) 15 is set to a low potential.

Here, the output of the NOR gate 15 is supplied to a cathode ray tube, and the display point lights up when the potential is high.

On the other hand, the interval setting circuit 11 is supplied with a clock signal as shown in FIG. 5(a). Now, we will explain the case where "0010" is set as preset data in the preset value counter 114.The clock signal causes the Q output of the D flip-flop 111 to change from the clock signal to 2 as shown in FIG. 5(b). The presettable counter 114 counts down the output of the D flip-flop 111 shown in FIG.
C), (d) + (a) - ('), and the zero-signal from the presettable counter 114 is output at the timing shown in Figure 5).

As a result, the output of the D flip-flop 113 becomes as shown in FIG. 5(h), and the output of the D flip-flop 11
The Q output of 2 becomes the output shown in FIG. 5 (1). Therefore, AND gate 11. As shown in Fig. 5(k), the output (TG) of
This is a pulse having a period of WT between the two pulses. Here, the period WT is wide relative to the preset value of the presettable counter 114, and is expanded or contracted in accordance with the preset value. In addition, Figure 5 (j) is the NAND gate 11
6 output, that is, the Rohtono 9 Lus is shown.

When no access signal is supplied, that is, during display operation, the switching circuit 13 outputs the output T of the AND gate 117 generated by the interval setting circuit 12.

is output as a clock signal and supplied to the timing signal generation circuit 12 and the address counter 1. At the same time, the R/W signal is in a low potential state, the memory 3 is controlled to be in a read state, the count value of the address counter 1 is selected by the multiplexer 2, and the data bus buffer 8 is controlled to be in a high impedance state.

Therefore, the memory 3 is addressed by the count value of the address counter 1, and X-axis circumferential data X1 and Y-axis circumferential data Y1 are sequentially read out from the memory 3 according to the address specification. The clock signal (=TG) supplied to the timing signal generation circuit 12 is a pulse shown in FIG. 6(a), which is the same as the pulse shown in FIG. 5(k).

This no J? L of the output of address counter 1 that received the signal
SB is as shown in FIG. 6(b), and the strobe signal Lx output from the timing signal generation circuit 12 is the sixth strobe signal Lx.
The strobe signal LY is as shown in FIG.
As shown in Figure (d). As a result, the X-axis circumferential data X1 read from the memory 3 is the strobe signal LxVc
The read Y-axis cylinder data Yi is then latched by the latch circuit 5 and latched by the latch circuit 6 by the strobe signal LYVc. The latch outputs of latch circuits 5 and 6 are D/A
The display points (X, , Yi) are converted into analog signals by converters 9 and 10 and applied separately as a horizontal deflection signal and a vertical deflection signal to the cathode ray tube, respectively, to be illuminated.
becomes a defined state. Further, as shown in FIG. 6(s)K, the timing signal generation circuit 12 generates X-axis circumferential data X1.
When this and its paired Y-axis circumferential data Y1 are latched, a signal U is generated, and the output of the NOR gate 15 becomes high potential at the timing shown in FIG. 6(f).

Therefore, during the period when the output of the node 15 is at a high potential as shown in FIG. 6(f), the D/A converter 9. The display point at the specified position will be illuminated by the output of lO. However, the period between successive pulses in which the output of Noake 15 is at a high potential is the WT corresponding to the preset value of the presettable counter 114, and the period WT can be expanded or contracted by changing the preset value. As a result, when the period WT is extended, the display becomes lighter due to the afterimage of the cathode ray tube, and when the period WT is shortened, the display becomes darker.

Incidentally, in the above nine cases, the case where two pulses are used to designate the display point is exemplified, but this need not be limited to two.

(Effects of the Invention) As described above, according to the present invention, position data is read from the storage means at intervals of nine hours set by the interval setting means, and the display point corresponding to the read position data is illuminated. Here, by changing the interval of the interval setting means, the brightness of the display point can be changed by the afterimage.

For example, when a normal signal waveform is displayed simultaneously with a signal waveform based on digitized data, the brightness can be set independently.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a schematic diagram showing the stored contents of a memory in an embodiment of the invention. 3 and 4 are block diagrams of an interval setting circuit and a timing signal generation circuit used in one embodiment of the present invention. FIGS. 5 and 6 are timing charts for explaining the operation of an embodiment of the present invention. 1...Address counter, 3...Memory, 5 and 6...Data latch circuit, 9 and 10...D/A
Converter, 11... Interval setting circuit, 12... Timing signal generation circuit.

Claims (1)

[Claims] In a brightness setting circuit of an oscilloscope, there is provided a storage means that stores in advance position data of each display point forming a display other than a normal signal waveform, a readout means that reads out the position data from the storage means, and a readout means that reads out the position data from the storage means. The apparatus further comprises: an interval setting means that can set a readout time interval of position data; and a D/A conversion means that converts the read position data into an analog signal and supplies it to the oscilloscope as a deflection signal. A brightness setting circuit characterized in that brightness is set by brightening a display point designated by a D/A conversion means.