JPS622396B2 - - Google Patents

Info

Publication number
JPS622396B2
JPS622396B2 JP57199097A JP19909782A JPS622396B2 JP S622396 B2 JPS622396 B2 JP S622396B2 JP 57199097 A JP57199097 A JP 57199097A JP 19909782 A JP19909782 A JP 19909782A JP S622396 B2 JPS622396 B2 JP S622396B2
Authority
JP
Japan
Prior art keywords
digit line
line
cell
circuit
boosting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57199097A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5891595A (ja
Inventor
Isao Ogura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57199097A priority Critical patent/JPS5891595A/ja
Publication of JPS5891595A publication Critical patent/JPS5891595A/ja
Publication of JPS622396B2 publication Critical patent/JPS622396B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
JP57199097A 1982-11-15 1982-11-15 ダイナミツク型半導体記憶装置 Granted JPS5891595A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57199097A JPS5891595A (ja) 1982-11-15 1982-11-15 ダイナミツク型半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57199097A JPS5891595A (ja) 1982-11-15 1982-11-15 ダイナミツク型半導体記憶装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP6721678A Division JPS54158828A (en) 1978-06-06 1978-06-06 Dynamic type semiconductor memory device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP61167815A Division JPS6251098A (ja) 1986-07-18 1986-07-18 ダイナミツク型半導体記憶装置

Publications (2)

Publication Number Publication Date
JPS5891595A JPS5891595A (ja) 1983-05-31
JPS622396B2 true JPS622396B2 (fr) 1987-01-19

Family

ID=16402066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57199097A Granted JPS5891595A (ja) 1982-11-15 1982-11-15 ダイナミツク型半導体記憶装置

Country Status (1)

Country Link
JP (1) JPS5891595A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2636050B2 (ja) * 1989-09-06 1997-07-30 富士通株式会社 半導体記憶装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS592118B2 (ja) * 1976-04-09 1984-01-17 日本電気株式会社 増巾回路
JPS5461429A (en) * 1977-10-26 1979-05-17 Hitachi Ltd Dynamic mis memory circuit

Also Published As

Publication number Publication date
JPS5891595A (ja) 1983-05-31

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