JPS62242995A - Musical tone signal generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a musical tone signal generating device used in an electronic musical instrument.

``Prior Art'' A major challenge in electronic musical instruments is how to generate musical tones that are close to the musical tones of natural musical instruments. Various methods are known for generating musical tone signals in electronic musical instruments.
Among these, the PCM method, which sequentially samples/rings each instantaneous value of the musical sound waveform of a natural musical instrument and stores it in memory, and generates a musical tone signal by reading out the stored sampling data, is the closest to that of a natural musical instrument. It is excellent in being able to generate musical sounds. This PCM system is disclosed in Japanese Patent Laid-Open No. 121313/1983 (title of invention: electronic musical instrument).

``Problems to be Solved by the Invention'' The sound waveforms of natural musical instruments vary slightly depending on pitch or range, even within the same instrument. For example, in the case of a piano,
Although slightly different, the musical sound waveform differs for each pitch (range). Note that, of course, the period of the waveform differs for each pitch, but the shape of the waveform itself other than the period also differs. Therefore, if you try to generate musical sounds that are truly close to those of natural instruments using the PCM method, musical sound waveforms must be stored for each instrument and, if necessary, for each pitch (range). The capacity becomes extremely large. That is, in a PCM type musical tone signal generating device, the biggest problem is how to reduce the memory capacity.

As a method to reduce this memory capacity 1, DPCM (Di
rrerentical Pulse CodeM
oduration), ADPCM (Adaptive
Differential Pulse
Methods such as Code Modulation) are known.

By the way, in order to further reduce the memory capacity, rather than storing the entire waveform from when a musical tone is sounded to when it is muted, it is possible to store only the attack part and a part of the waveform after it, and read out the waveform of the attack part to form the musical tone. After reading out a part of the waveform repeatedly, musical tones can be formed, or by storing only a desired part of the waveform of the entire waveform and repeatedly reading it out, musical tones can be formed. It is more efficient to do this, and the memory capacity is 11
You only need one less. Note that such a method, for example,
This is disclosed in Japanese Patent Application Laid-Open No. 59-188679.

However, when decoding data stored using the above-mentioned DPCM, ADPCM, etc., the current decoded value is created based on the decoded value of one side and the successive data at the current time, so Data continuity must be guaranteed. Conventional DP
Musical tone signal generators that use methods such as CM and ADPCM (methods based on differential modulation methods) do not have the ability to ensure the continuity described above, and for this reason, the above-mentioned repeated readout is not possible, and the The configuration was such that all waveforms up to the time of muting were stored, which was extremely disadvantageous in terms of efficiency and memory capacity. Also, in this situation, D
M (Delta Modulation) and ADM (
Adaptive Delta Modularity
The same applies to musical tone signal generators based on the on) method (a method based on the delta modulation method).

Note that in a musical tone signal generating device using the PCM method, there is no need to refer to the readout data of Moe times, so it is relatively easy to repeatedly read out a part of the waveform to form a musical tone (for example, , JP-A-59-1
88697, etc.), but in this case, the aforementioned problem of increased memory capacity remains.

This invention was made in view of the above-mentioned circumstances, and
In a musical tone signal generation device that stores compressed data based on differential or delta modulation methods such as PCM, ADPCM, ADM, and DM in memory, and reads and decodes the data to generate musical tone signals, continuity of waveforms is ensured. It is possible to perform repeated readout successfully while
It is an object of the present invention to provide a musical tone signal generating device that can generate musical tone signals more efficiently and significantly reduce memory capacity.

[Means for Solving the Problems] In order to solve the above-mentioned problems, the present invention compresses waveform data representing each instantaneous value of a musical sound waveform for multiple periods by compression calculation based on a delta or differential modulation method. Repeatedly reading all or a part of the compressed data in the storage means storing the compressed data and the storage means 1111;
a decoding means for decoding by a decoding operation; and a control means for supplying predetermined initial data to the offender decoding means when decoding the leading data in repeated reading of the compressed data; Based on this, a musical tone signal is generated.

1. Effect: When serially compressed data is repeatedly read out, the leading data of the repeated reading is decoded with reference to predetermined initial data, so that the leading data is accurately decoded.

Embodiment A musical tone signal generating device according to an embodiment of the present invention will be described below with reference to the drawings. Note that this embodiment is an embodiment in which the waveform data stored in the memory is compressed by the ADl)CM method.

[Basic configuration of example] First, the basic configuration of this embodiment will be explained.

FIG. 2 is a block diagram showing the basic configuration of the same embodiment.
A data memory (waveform memory) 3 is a data decoding circuit that decodes data read out from the ADPCM data memory 2.

In the data compression circuit 1, 4 is a microphone for picking up the musical sounds of natural instruments, 5 is a microphone [1] The output signal of the fan A4 is sampled at a constant period, and 12 pips! This is an analog/digital converter (hereinafter referred to as an A/D converter) that converts the PCM code Sn into the PCM code Sn. 6 is the deviation detection point, and P is the reproduction value of the PCM code Sn- of the OH times.
CM playback code◇S n-+(P CM playback code◇5
The difference between the current PCM code Sn and the current PCM code Sn is calculated, and the difference PCM code en, which is the difference, is supplied to the encoder 7. The encoder 7 quantizes the differential PCM code en obtained at the deviation detection point 6 using the ADPCM method described later, and outputs it as a 4-bit imperialized differential code Cn (the most significant bit is a sign bit). In this case, the content of the quantized difference code Cn is
Difference 1) Corresponds to the sum of the CM code en and the m childization error εn. 8 is a quantization width control circuit that sets adaptive quantization width data Δn (8 to 12 bits) in the encoder 7 based on the value of the quantization difference code Cn output by the encoder 7, and its processing operation is as follows. It is as follows.

First, assuming that the immediately preceding quantization width data is Δ11-1, the quantization width control circuit 8 performs the following calculation to obtain the next quantization width data Δn.

Δn−Δn−,·k (1) k in equation (1) is a coefficient determined by the value of the immediately preceding quantized difference code Cn−+.

FIG. 3 is a diagram showing the relationship between the value of the quantized difference code Cn and the above-mentioned coefficients. As shown in the figure, the value increases as the absolute value of the quantized difference code Cn increases. It is set. However, in this embodiment, the value obtained by rounding off the value of the coefficient shown in FIG. In addition, Cn= in FIG.
r1000" corresponds to decimal "0".

As shown in FIG. 4, the encoder 7 calculates the relative value en/Δn of the difference PCM code en when the value of the quantization width data Δn is rlJ, and outputs this calculated value as the quantization difference code Cn. In this case, en/Δ
The value of n can take any value between -t and +l, but since the quantized difference code On is 4 bits, a linear conversion operation cannot be performed. Therefore, in this embodiment, e
n/Δn is divided into sections as shown in FIG. 5, and conversion into quantized difference code On is performed in correspondence with each section. For example, when en/Δn is 1/2 or more and less than 5/8, the quantization difference code Cn is set to rolooJ, and when en/Δn is 0 or more and less than 1/8, the quantization difference code On is set to rooooJ. shall be.

Next, 9 is the quantization difference code Cn and the adaptive quantization width Δn
This is a decoder that reproduces the differential PCM code en and the quantization error εn based on the above, and the specific reproduction process is as follows.

If each bit of the quantized difference code Cn is (B3.B2°r3b, no), then en+εn can be calculated by the following equation.

en+e n=(12・Bs)・(Δn/2・B.

+(Δn/4)・I3,+(Δn/8)HB o+
Δn/8)・・・・・・(2) In the above formula (2), the underlined terms are:
B3, which is the term that creates the code and is the sign bit, is “l”
When it is "0", it is negative, and when it is "0", it is positive.

Also, the term enclosed in curly brackets is a term corresponding to the absolute value, and the value obtained by multiplying the value of Δn by the weight of each bit is added, and the offset value Δn/8 is added to en
The absolute value of +εH is created.

The differential PCM code en outputted from the decoder 9 is sent to the delay flip-flop 11, which is a delay element, at an addition point 1.
0, and here, it is supplied to the summing point 10 and the deviation detection point 6 after being delayed by 1 clock. As a result, at the addition point 10, the current difference PC
The M code en and the previous differential PCM code gn-+ are added.

The result of the calculation of adding the current difference value to this turn difference value corresponds to the peak value of the signal Sn currently being supplied to the deviation detection point 6 due to the nature of the differential modulation method. That is, the above calculation is a calculation for reproducing the current PCM code. Therefore, the signal output from the addition point IO is
The PCM reproduction code◇ becomes Sn, and the output signal of the delay flip-flop 11 is the previous PCM reproduction code◇
S n-1 (however, ◇Initial value of Sn◇S is 0
). In this way, the quantization width control circuit 8, the decoder 9, the addition point IO, and the delay flip-flop 11 have the function of decoding the PCM code Sn- at one sampling point. Then, I) The CM playback code ◇Sn-+ is supplied to the deviation detection point 6 as described above, where the deviation from the currently supplied PCM code Sn is taken, and the fundamentals when performing the differential modulation method are Difference detection, which is a specific process, is performed.

The above is the configuration and operation of the data compression circuit I, and the quantized difference data Cn created as described above is
The data are sequentially stored in the PCM data memory 2.

Next, the quantization width control circuit 16 in the data decoding circuit 3
, decoder 15, addition points! 7 and the delay flip-flop 18 are respectively the aforementioned quantization width control circuit 8, decoder 9, and addition point! 0 and delay flip-flop 1
1, and sequentially decodes the quantized difference codes Cn sequentially read from the ADPCM data memory 2 to reproduce the PCM code Sn. Further, the encoder 7 in the circuit described above is of an error feedback type in which errors are not accumulated during reproduction, and the input/output relationship between the encoder 7 and the decoding processing circuit consisting of the quantization width control circuit 8, the decoder 9, and the delay flip-flop 11, By matching the calculation accuracy, error components can be suppressed as much as possible.

The above is the basic configuration of this embodiment. Note that the data compression circuit l shown in FIG. 2 is not provided in a normal musical tone signal generating device. This data compression circuit 1 is provided in the case of a sampling electronic musical instrument (an electronic musical instrument that allows a performer to sample sounds himself).

Also, in the specific configuration of the embodiment described below, the data compression circuit l is not provided.

[Specific configuration of embodiment] Next, the specific configuration will be explained. FIG. 6 is a block diagram showing a specific configuration of an electronic musical instrument to which the musical tone signal generating device of this embodiment is applied, and the electronic musical instrument shown in this figure will be explained below.

Firstly, the method for forming musical tones in this electronic musical instrument will be explained.

First, in the ADPCM data memory 35, musical tone signals standardized and compressed by the data compression circuit 1 shown in FIG. 2 are stored for each tone and for each touch intensity (key depression intensity). It is stored for each pitch (for each keyboard key). For example, if there are 10 types of tones, 40 keys, and 5 levels of touch intensity, 1Ox40x5=2000 types of musical tone signals are stored. In this case, ADP
Each musical tone signal stored in the CM data memory 35 is not the entire waveform from the start to the end of the musical tone, but the seventh waveform.
As shown in the figure, the waveform of the attack part ATC of a musical tone and the waveform that follows this attack part ATC (repetition part RP
'r waveform). And when forming musical tones,
First, the waveform of the attack section ATC is read out, and then
The waveform of the repeat section RPT is repeatedly read out. After an envelope is added to this read waveform, D
/A conversion and a musical tone signal.

The circuit shown in FIG. 6 will be described in detail below. First, code 36
37 is a keyboard, and 37 is a touch detection circuit. When any key on the keyboard 36 is pressed, the touch detection circuit 37 detects the touch intensity of the key and outputs touch data TD corresponding to the detected touch intensity. The method for detecting this touch strength is to provide a contact point for each key that turns on when the key is pressed down slightly and a contact point that turns on when the key is pressed down to the lowest point. A method of detecting the touch intensity based on the time between keys being turned on sequentially, or a method of installing an element to detect key press pressure such as a piezoelectric element at the bottom of the key and detecting it based on the output of this element. etc. are taken.

Reference numeral 38 denotes a key press detection circuit, which detects the on/off state of each key by applying JI (JI) to the output of the key switch provided below iW≦ of each key of the keyboard 36. If it detects that the same key has been pressed, it outputs the key code KC of the same key and outputs the key-on signal KO.
N (“l” signal), and this key-on signal K
At the rising edge of OH, a key-on pulse KONP is output. Further, when it is detected that the key is turned off, the key-on signal KON is returned to the "0" signal. Also,
If a plurality of keys are turned on at the same time, the above process is performed for only one of the keys (for example, the key turned on after the last key or the key with the highest note). The node clock generation circuit 39 generates a note clock NCK having a frequency corresponding to the pitch of the key indicated by the key code KC output from the key press detection circuit 38, and outputs it to each section. Address counter 40 counts up note clock NCK and supplies the count output to adder circuit 41 .

The timbre selection circuit 42 is composed of a plurality of timbre selection operators and an attached circuit, and outputs a tone code TC corresponding to the currently set timbre of the timbre selection operator. The start address memory 43 is the ADPCM data memory 35.
This is a memory in which address data indicating the storage address of the first data of each musical tone signal is stored, and when the key code KC, tone code TC, and touch data TD are supplied, the musical tone corresponding to each of these data is stored. Address data indicating the start address of the signal is read out and output as start address data SA. The repeat address memory 44 is a memory in which address data indicating the storage address of repeat data of each tone signal in the ADPCM data memory 35 is stored. Here, the repeat data refers to the first data of the repeat section RPT shown in FIG.

When the key code KO, tone code TO, and touch data TD are each supplied to the repeat address memory 44, address data indicating the storage address of the repeat data of the musical tone signal corresponding to each of these data is read out.
It is output as repeat address data RA. , 45
is a selector, which selects either start address data SA or repeat I/address data RΔ,
Output to adder circuit 4I. 46 is a set/reset flip-flop that controls the selector 45. When the output Q of this flip-flop 46 is a "0" signal, the input terminal A of the selector 45 is selected and the start address data SA is sent to the adder circuit 4I. Also, when the signal is "I", the input terminal B of the selector 45 is selected and the repeat address data R'A is output to the adder circuit 41. Adder circuit 41 adds the output of address counter 40 and the output of selector 45, and supplies the addition result to ADPCM data memory 35 as address data AD.

The attack end address memory 47 is a memory in which address data indicating the storage address of the attack end data of each tone waveform in the ADPCM data memory 35 is stored. Here, the attack part end data is
This refers to the last data of the attack section ATC shown in FIG. When the key code KC, tone code TC, and touch data TD are each supplied to the attack end address memory 47, address data indicating the storage address of the attack section end data of the musical sound waveform corresponding to each of these data is read out. Attack end address data AE
It is output to the comparison circuit 48 as A. The comparison circuit 48 is
The address data AD output from the adder circuit 41 is compared with the attack end address data AEA, and when the two match, an attack end signal AEND ("I" signal) is output. 49 is D-F'F (
The delay flip-flop delays the attack end signal AEND by I timing of the note clock NCK and outputs it as a signal AENDD. The repeat end address memory 51 is a memory in which address data indicating the storage address of the repeat part end data of each tone waveform in the ADPCM data memory 35 is stored. Here, the repeat part end data is the repeat part RP shown in FIG.
Say the last data of T. When the key code KC, tone code TC, and touch data 1'1) are each supplied to the repeat end address memory 51, the address data indicating the storage address of the repeat end data of the musical sound waveform corresponding to each of these data is read. and is output to the comparator circuit 52 as repeat end address data REA. The comparison circuit 52 compares the address data AD output from the adder circuit /II and the repeat end address data I' (EA), and when they match, outputs a repeat end signal REND same 1'' signal. 53 is a D-FF for timing adjustment, and repeat end signal R
END is delayed by one timing of the note clock NCK and output as a signal 12 EN DD D.

Next, 63 is an ADPCM decoding circuit that decodes compressed data Cn outputted from the ADPCM data memory 35, the details of which are shown in FIG. This decoding circuit 63
This circuit is not shown in the figure and corresponds to the decoding circuit 3.

In FIG. 1, 100 is an ADP that outputs a coefficient k corresponding to the value of the quantized difference need Cn when it is supplied.
This is a CM coefficient memory, and the conversion data shown in FIG. 3 is stored. The coefficients output by this ADPCM coefficient memory +00 are supplied to one input terminal of the multiplier 10I,
Here, the product of the budding cycle and the m child width data Δn-1 is taken. That is, the above-described calculation of equation (1) is performed, and the current quantization width data 80 is calculated. This multiplier 1
The output signal 0I is supplied to input terminal B of the selector 102. The selector 102 selects the input terminal A when the "I" signal is supplied to the terminal SA, and selects the input terminal B when the "I" signal is supplied to the terminal SH. That is, selector 10
2 selects input terminal A only when the key-on pulse KON I) is output, and selects input terminal B in other cases. Reference numeral 103 denotes an initial value ΔnO storage unit in which an initial value Δn0 of the quantization width data Δn is stored, and the initial value Δn is the stored value.

is supplied to input terminal A of selector 102. The output signal (Δn or Δno) of the selector 102 is used to regulate the maximum and minimum values of the decoder 110, the delay flip-flop 105, and the latch quantization width data Δn via the maximum/minimum control unit 104. For example, The minimum value is (te)1o, and the maximum value is (+552). If the quantization width data Δn exceeds these limit values, the limit values are forcibly output. The delay flip-flop 105 rotates the quantization width data Δn with one clock timing based on the note clock NCK, and when the latch 106 is supplied with the attack end signal AEND, The width data Δn is taken in and latched. Above delay flip-flop +05 and latch 10
Each of the output data of 6 is input to the input terminal AS of the selector 107.
B is supplied. Selector 107 sets “I” to terminal SA.
When the signal is supplied, input terminal A is selected and “I” is input to terminal SB.
"When the signal is supplied, input terminal B is selected. Selector !07 selects input terminal B only when the signal RENDD is supplied, and otherwise selects input terminal A. In this case, when the input terminal A of the selector 107 is selected, the quantization width data Δn-1 delayed by one clock timing by the delay free controller 105 is output from the output terminal S. When end B is selected, the data in the latch 106 is output, and the operation in this case will be described later.The quantization width control circuit 108 is configured with the above configuration.

Next, the decoder 110 converts the decoder 7.1 shown in FIG.
5, it is a decoder that performs the calculation of equation (2) above,
Further, numeral 111 is an addition point similar to addition point 17 shown in FIG. Therefore, the output signal of decoder 110 is (e
n+εn), and the output signal of addition point III is (
Sn+εn).

+15 is a delay flip-flop similar to the delay flip-flop I8 shown in FIG. Output with delayed clock timing. 116 is
This gate is in an open state when the key-on pulse KONP is not output, and in the open state, the output signal of the delay flip-flop
17 input terminal. 118 is latched and C is turned,
When the attack end signal AI (N I) is supplied (Jl-), the data supplied to the input terminal (Jl) is fetched and latched. The output signal of this latch 118 is the selector 1
fJ (is supplied to the input terminal B of 17. The selector 117 is
It has the same configuration as the selector 117, and the signal RE
N l) Select input terminal B only when D is supplied, otherwise select input terminal A. In this case, selector! When input terminal 17 is selected, data ◇S n-1 delayed by one clock timing by delay flip-flop 115 is output from output terminal S. Also,
When the input terminal B of the selector 117 is selected, the data in the latch +18 is outputted, and the operation in this case will be described later.

Next, in FIG. 6, 86 is an envelope generator, which generates envelope data ED determined according to the key code KC, tone code TC, and touch data TD after the key-on signal KON rises to the "L" signal. are sequentially output and supplied to the multiplication circuit 87. 8th
Figure (a) shows the key-on signal KON, (b), (c)
Each shows an example of a change in the value of envelope data ED. Here, (b) is a case of a percussive tone, and (c) is a case of a sustained tone tone. The multiplication circuit 87
The decoded data Sn+εn output from the DPCM decoding circuit 63 is multiplied by the envelope data ED, and the multiplication result is output to the D/A converter 88.

The D/A converter 88 converts the output data of the multiplication circuit 87 into an analog signal and outputs it to the sound system 89. A sound system 89 amplifies the output signal of the D/A converter 88 and produces sound through a speaker.

[Operation of Embodiment] Next, the operation of this embodiment with the above-described configuration will be explained.

First, the performer operates the tone selection operator to select a musical tone.
Tone code 1゛C corresponding to the set tone is output and supplied to the circuit valley. Next, when the player presses any key on the keyboard 3G, the touch detection circuit 37 outputs touch data TD, and the key press detection circuit 38 outputs a key-on pulse K.
ON +), key-on signal KON (“l” signal),
The key code KC/+<3 is output to each part of the circuit. When a key-on pulse (KON I) is output from the key press detection circuit 38, this key-on pulse KONP is supplied to the reset terminal R of the flip-flop 46, resetting the flip-flop 46, and at the same time outputting the address via the OR gate 76. is supplied to the counter 40, thereby
Address counter 40 is reset. Furthermore, when the key-on signal KON is output from the key press detection circuit 38, the envelope generator 86 outputs envelope data ED. In addition, the key code KC is outputted from the key press detection circuit 38 and supplied to the node clock generation circuit 39.
0 bani mouth -1KVρ? - Note clock NCK of erectile + 1 field oil number is outputted and supplied to the address counter 40. The address counter 40 counts up this note clock NCK. As a result, the count output of the address counter 40 becomes 0, 1.2...
and changes sequentially. The count output of the address counter 40 is supplied to an adder circuit 41, and added to the output of the selector 45 in the adder circuit 41. At this time, the flip-flop 46 has been reset, and therefore the start address data SA output from the start address memory 43 is output from the selector 45. As a result, the output of the adder circuit 41 becomes data obtained by adding the start address data SA and the count output of the address counter 40, and this data is output to the ADPCM data memory 35 as address data AD. Sunaitsuchi, rsA+0JJsA+IJJsA+2
J... Address data AD is sequentially converted to ADPC.
It is output to the M data memory 35. This allows ADP
From the CM data memory 35, ``First, one new data Cn of compression data Cn of the attack section ATC is outputted and supplied to the ADPCM decoding circuit 63.''

At this time, the repeat end signal RE N D is at the "0" signal, and the key-on pulse K ON P only becomes the "L" signal only when the key is on, and then immediately becomes the "0" signal, so the signal after the key-on is is selector 107.11
7 (FIG. 1) is selected, and the data supplied to the same input terminal A is outputted from each output terminal S. That is, at this point, the ADPCM decoding circuit 63 in FIG. 1 is the same circuit as the decoding circuit 3 in FIG. 2. Note that when the key is on, the key-on pulse KONP is “I”.
”, the gate 116 is closed, and the selector II
7 outputs the data in the latch 118, but since the latch 118 is cleared in the initial state, the internal data at this time is "0".

Therefore, when the key is on, data en+εn output from the decoder 110 is output via the addition point 111 as data Sn+εn.

As described above, the compressed data Cn output from the ADPCM data memory 35 is decoded in the ADPCM decoding circuit 63 in the same manner as described above, and the decoded data S
It is output as n+εn.

Then, an envelope is added to this decoded data Sn+εn in a multiplication circuit 77, the output of this multiplication circuit 77 is converted into an analog musical tone signal in a D/A converter 78, and this analog musical tone signal is converted into a sound system 79.
is pronounced as a musical tone. In this way, musical tones are successively formed. Thereafter, reading of the ADPCM data memory 35 progresses, and as a result, the attack section ATC
A musical tone is formed.

When the address data AD matches the attack end address AEA, the comparison circuit 48 outputs an attack end signal AEND, and the attack end signal AE
ND is applied to the load terminals of latches 106 and 118 (FIG. 1). As a result, the latch 106 contains quantization width data Δ corresponding to the last data of the attack section ATC.
Decoded data Sn+εn, where n is stored, is stored.

Furthermore, one timing of the note clock NCK after the generation of the attack end signal AEND, the D signal shown in FIG.
-The signal AENDD is output from the FF49. This signal AENDD is supplied to address counter 40 via OR gates 78 and 76, thereby resetting address counter 40. Also, signal A, E N D D
is supplied to the set terminal S of the flip-flop 4G,
This sets flip-flop 46. When the flip-flop 46 is set, the repeat address data RA is sent to the adder circuit 41 via the selector 45.
supplied to

Thereafter, from the adder circuit 41, rRA+QJJRA+IJ,
Address data AD of rlZA+2J .

Next, the address data AD is the repeat end address r
If it matches lEA, that is, the first dormitory of 'J− signal)
is output and supplied to the D-FF 53 (FIG. 6). As a result, the D-FF53 outputs the repeat end signal REND.
signal R delayed by l clocks of note clock NCK
ENDD is output and supplied to the reset terminal R of the address counter 40 via the OR gate 76. This results in
Address counter 40 is reset, and address data AD output from adder circuit 41 becomes repeat address data RA again. Therefore, from the ADPC data memory 35, the first compressed data Cn of the repeating part RPT
is output.

Further, the signal RENDD is applied to the selector 1 shown in FIG.
07, 117, and as a result, the same selector 107
, 117 is selected.

When this input terminal B is selected, the outputs of latches 106 and 118 are outputted via selectors 107 and 117, respectively. Therefore, at the time when the first compressed data Cn in the second tone formation of the repeat section RPT is read out, it should be referred to as the previous value (H quantification width data Δn-1 and PCM playback code ◇Sn-, , each attack part A
This corresponds to the last compressed data Cn of T.sub.C, and the result is the same as if the musical tone had been formed successively from the attack section A.sub.TC.

From then on, every time the node clock NCK is output, the adder circuit 4! From rRA+ IJ, rRA+2J...
. . address data AD are sequentially outputted, thereby performing the second musical tone formation in the repeat section RPT.

When the musical tone formation of the second repetition part RPT is completed as described above, the third, fourth, etc. repetition part R1) is thereafter performed in exactly the same process as above. The musical tone formation is carried out.

Next, when the performer releases the key, the key-on signal KON is activated.
returns to “0” signal. As a result, the envelope data ED is successively attenuated to "0", and therefore the generated musical tone is attenuated and stopped.

[Modifications of the above embodiments] (1) The ADPCIVI decoding circuit 63 shown in FIG. 1 may be configured as shown in FIG. 9. In the circuit shown in FIG. 9, the latches 106 and 118 in FIG. 1 are not provided, and instead, a Δn repeat section initial value memory 120 and an attack section final data value memory +21 are provided. There is. In this Δn repetition section initial value memory 120, quantization width data Δn corresponding to the last compressed data Cn of the attack section ATC is stored in advance in correspondence with each musical sound waveform in the DPCM data memory 35. When the key code KC, tone code TC, and touch data TD are supplied, the corresponding data quantization width data Δn is output. In addition, the attack section final data value memory 121
The last PCM code Sn of the attack section ATC is set in advance.
+εn is stored corresponding to each tone waveform in the DPCM data memory 35, and when the key code KCJ-n code TC and touch data TD are supplied, the corresponding values pρ are stored as K −+ −V. Le middle mockery 1
- The other configurations are the same as the circuit shown in FIG.

(2) Although the above embodiment is a single-tone electronic musical instrument, the present invention is of course applicable to a multi-tone electronic musical instrument. In the case of a multitone electronic musical instrument, it is preferable to use time division processing.

(3) The arithmetic processing of the comparison circuits 48, 52, multipliers 87, 101, etc. in the embodiment described above may be performed by time-sharing processing.

(4) In the above embodiment, the musical sound waveform stored in the ADPCM data memory 35 is a standardized waveform, but a non-standardized waveform with an envelope may be stored in the memory 35.

(5) In the above embodiment, musical sound waveforms were stored in correspondence with each of the tone code TC, key code KC, and tag data TD, but musical sound waveforms were stored in correspondence only with tone code 'rC. good. Furthermore, musical sound waveforms may be stored corresponding to each operation state of the operator operated by the player. Any combination of the above is possible.

(6) Instead of storing musical sound waveforms for each key code KC and each touch data TD, an interpolation calculation may be used. For example, in the case of touch data TD, a waveform corresponding to the strongest touch data TD and a waveform corresponding to the weakest touch data TD are respectively stored, and in the case of intermediate touch data TD, the waveforms corresponding to the strongest and weakest touch data TD are stored. A waveform is obtained from each waveform corresponding to the weak touch data TD by interpolation calculation. Note that the circuit configuration for performing this interpolation calculation is disclosed in Japanese Patent Laid-Open No. 60-55398.

(7) In the above embodiment, there is one repeating section RPT, but a plurality of repeating sections may be provided and switched over in time. Further, in that case, a catch connection (see Japanese Patent Application Laid-open No. 147793/1983) may be used in order to make the connection between one repeating part and the next repeating part smooth. Alternatively, a waveform connection method as described in Japanese Patent Laid-Open No. 59-188697 may be used.

(8) Waveform encoding can be done by first storing the analog/digital converted waveform in memory using PCM, and then encoding this stored data.
It is also a good idea to perform compression processing in real time.

(9) In the above embodiment, the output data of the A/D converter 5 is normalized and then compressed. After that, the data may be compressed after appropriate waveform editing.

(10) In the above embodiment 45, the sound is collected by the microphone 4 and A/D converted by the A/D converter 5 to obtain the original musical sound data, or alternatively, the sound data is obtained by computer simulation. The original musical tone data may also be obtained.

(11) A sampling electronic musical instrument may be constructed by incorporating the data compression circuit, ADPCM data memory, and data decoding circuit into one electronic musical instrument.

(I2) The present invention is applicable not only to keyboard instruments but also to electronic musical instruments without a keyboard, such as a sound source module or a rhythm sound source.

(13) A (digital) filter whose filter characteristics change according to the touch data TD, key code KC, etc. may be provided at the subsequent stage of the decoding circuit, and the tone may be controlled by passing the data through this filter.

(14) The address data AD of the ADPCM data memory 35 may be formed by a method other than the above embodiment. For example, a method of accumulating F numbers (frequency numbers), AL
Method of forming address data by sequential subtraction from L “!”, preset type address counter 4
Any method may be used, such as a method of presetting the start address using 0, or a method of calculating the address using a (micro) program.

(15) Linear prediction (Lpc) is applied to ADPCM in the embodiment.
) Data compression may be further achieved by combining data compression methods and encoding methods such as ADM, DPCM, and DM.

(16) Although the embodiment shows the case of ADPCM, the present invention can also be applied to other differential modulation methods and delta modulation methods such as ADM, DM, and DPCM.

(I7) In the above embodiment, both the attack part and the repetition part were stored in the memory, but instead of this,
It is also possible to store only the repeat section (or attack section or desired section) in the memory and read it out repeatedly (all of the stored data) to form the musical tone signal. In this case, although the quality of the generated musical tone signal deteriorates to some extent, the memory capacity can be reduced accordingly, making it particularly suitable for an inexpensive musical tone signal generating apparatus.

"Effects of the Invention" As explained above, according to the present invention, it is possible to repeatedly read all or part of the compressed data compressed based on the delta or differential modulation method and stored in the memory to generate a musical tone signal. You can do it.

As a result, the memory capacity can be further reduced significantly compared to the conventional method.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the main part of an embodiment when the present invention is applied to an electronic musical instrument, FIG. 2 is a block diagram showing a basic configuration example of the same embodiment, and FIG. 3 is a coefficient FIG. 4 is a diagram showing the data compression principle in encoder 7. FIG. 5 is a diagram showing the relationship between differential PCM code gn, i quantization width data Δn, and quantization difference code Cn. FIG. 6 is a block diagram showing the overall configuration of the embodiment, FIG. 7 is a waveform diagram showing an example of a musical sound waveform, FIG. 8 is a waveform diagram showing an example of an envelope waveform, and FIG. 9 is a waveform diagram showing an example of an envelope waveform.
The figure is a block diagram showing the configuration of a modified example of the same embodiment. 1...Data compression circuit, 2,35...A
DPCM data memory, 3.63...ADPC
M decoding circuit, 106, 118...Latch, 10
7,117...Selector, 120...
Δn repetition section initial value memory, +21...attack section final data value memory. Applicant: Nippon Musical Instruments Manufacturing Co., Ltd. Figure 7 Figure 8

Claims (1)

[Scope of Claims] (a) Storage means storing compressed data obtained by compressing waveform data representing each instantaneous value of a plurality of cycles of musical sound waveforms by compression calculation based on a delta or differential modulation method; (b) said storage means; (c) decoding means for repeatedly reading out at least part of the compressed data in the storage means and decoding it by a decoding operation; (c) when decoding the leading data in the repeated reading of the compressed data, the decoding means A musical tone signal generating device, comprising: control means for supplying data to a musical tone signal, and generating a musical tone signal based on data decoded by the decoding means.