JPS62257511A - Mounting structure for various printed board constituting computer system to case - Google Patents
Mounting structure for various printed board constituting computer system to caseInfo
- Publication number
- JPS62257511A JPS62257511A JP61100975A JP10097586A JPS62257511A JP S62257511 A JPS62257511 A JP S62257511A JP 61100975 A JP61100975 A JP 61100975A JP 10097586 A JP10097586 A JP 10097586A JP S62257511 A JPS62257511 A JP S62257511A
- Authority
- JP
- Japan
- Prior art keywords
- case
- computer system
- housing
- mounting
- various printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Combinations Of Printed Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、計算機システムを構成する各種プリントボー
ドの筐体への実装構造に係り、特に計算機を構成する各
種プリントボードを筐体に実装するに際し、シングルシ
ステム、デュアルシステム等自在に構成でき、かつ、２
組の計算機が１つのメモリを共有することのできる計算
機システムを構成する各種プリントボードの筐体への実
装構造に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a structure for mounting various printed boards constituting a computer system in a housing, and particularly relates to a mounting structure for mounting various printed boards constituting a computer in a housing. In this case, it is possible to freely configure a single system, dual system, etc., and
The present invention relates to a structure for mounting various types of printed boards in a case, which constitute a computer system in which a set of computers can share one memory.
各社の計算機システムの二重化方式の代表とし横河北辰
電機社の技術資料ＴＭ３４Ｄ３）１１−０１の「二重化
シールドコントロールステーション」の中に示されるシ
ステムＣＥＮＴＵＭ −Ｄ挙げることができる。The CENTUM-D system shown in the "Duplicate Shield Control Station" of Yokogawa Hokushin Electric Co., Ltd.'s technical data TM34D3)11-01 can be cited as a representative example of duplex systems for computer systems of various companies.
一般に二重化は通信の機能を持っており、二重化の際の
バックアップに要する各種の情報を２台の計算機システ
ム相互間で送受するようにしである。したがって、バッ
クアップの情報量が多くなると、通信の速度ならびに信
頼性（確実に信号を伝達すること）に難点がある。Generally, duplexing has a communication function, in which various types of information required for backup during duplexing are sent and received between two computer systems. Therefore, when the amount of backup information increases, there are problems with communication speed and reliability (reliably transmitting signals).
また、共有メモリ方式でバックアップの情報を他方へ伝
達する方式においては、計算機の信号として高速性を有
するメモリバスを外部へ導出することは非常に困難を伴
う、したがって、バスを外部へ導出するためには、バッ
ファ回路を介在させたり、バスの高速性を落したりする
などの方式が採用されている。In addition, in the shared memory method of transmitting backup information to the other party, it is extremely difficult to route the high-speed memory bus to the outside as computer signals. For this purpose, methods such as interposing a buffer circuit or reducing the high speed of the bus are adopted.
本発明の目的は、共有メモリを有する２組の計算機シス
テムの各種プリントボードの筐体への最な実装と、ＩＭ
の計算機システムにおける拡張スペースの確保をはかる
ことのできる計算機システムを構成する各種プリントボ
ードの筐体への実装構造を提供することにある。The objects of the present invention are to optimally implement two sets of computer systems each having a shared memory in a case of various printed boards, and to provide an IM
An object of the present invention is to provide a structure for mounting various printed boards constituting a computer system in a housing, which can secure expansion space in the computer system.
現在ＥＸの改良を実施しているが、改良項目のひとつに
自動バックアップ機能の確立がある。We are currently improving EX, and one of the improvements is establishing an automatic backup function.
ＥＸシステムはマイクロコンピュータを応用した計測制
御システムの総称基で、入出力２００〜４０００点の演
算制御を行う。従って自動バックアップするに際し、バ
ックアップに必要な情報量は５〜ｌ０ＫＢと大きくこれ
を通信で実施すると。The EX system is a general term for measurement control systems using microcomputers, and performs arithmetic control of 200 to 4000 input/output points. Therefore, when performing automatic backup, the amount of information required for backup is large, 5 to 10 KB, if this is carried out via communication.
２００ｍ５程度を要する。演算制御の周期を０．５〜Ｉ
Ｓとした場合２００ｍ５の占有率は無視できない。これ
に対し、共有メモリ方式では２０ＩＩｌｓ程度と１桁小
さい。しかし、共有メモリ方式を採用するには、ＣＰＵ
−メモリ間にＢＵＳを極力短かくした（５０ｏ以内）各
種プリントボードの実装を確立する必要がある。従って
一般の通信の如くケーブルでの結合は不可能に近く各々
５ｏ■以内に２組の計算機を構成するプリントボードを
マザーボード上に配する実装を検討した。It takes about 200m5. Calculation control period 0.5 to I
In the case of S, the occupancy rate of 200m5 cannot be ignored. On the other hand, in the shared memory method, the time is about 20 IIls, which is one order of magnitude smaller. However, in order to adopt the shared memory method, the CPU
- It is necessary to establish mounting of various printed boards with the shortest possible BUS (within 50 degrees) between memories. Therefore, it is almost impossible to connect them with cables as in general communication, so we considered mounting two sets of printed boards on a motherboard, each of which constitutes two sets of computers within 5 degrees of each other.
そこで、本発明は２つのマザーボードをコネクタを介し
て直結するものである。Therefore, the present invention directly connects two motherboards via a connector.
以下、本発明の実施例について説明する。 Examples of the present invention will be described below.
第１図には本発明の筐体への一実施例が示されている。FIG. 1 shows an embodiment of the casing of the present invention.
図において、１−Ａ、 １−Ｂは独立した構造物、２−
Ａ、２−Ｂは独立したマザーボード、３−Ａ。In the figure, 1-A and 1-B are independent structures, and 2-
A, 2-B are independent motherboards, 3-A.
３−Ｂ、４−Ａ、４−Ｂは各々独立したプリントボード
並に電源装置である。また、ＣＮＡ−８２は上下重ねた
筐体の信号電源をマザーボード同志で「Ｌ結するための
コネクタである。この第１図のマザーボードは、第２図
に示す通りである。すなわち、２−Ａ、２−Ｂが独立に
構成され、ＣＮＡ−Ｂ１゜ＣＮＡ −Ｂｓが配され、Ｃ
ＮＡ ｎｓとＣＮＡ−［Ｉｚでケーブル等を介さずマ
ザーボード上で直結する。3-B, 4-A, and 4-B are independent printed boards and power supplies. In addition, CNA-82 is a connector for connecting the signal power supplies of the upper and lower cases between the motherboards.The motherboard shown in Fig. 1 is as shown in Fig. 2. , 2-B are configured independently, CNA-B1°CNA-Bs are arranged, and CNA-B1゜CNA-Bs is arranged.
Connect NAns and CNA-[Iz directly on the motherboard without using cables.
また、信号並に電源のブロック線図的に実装機能を示す
と第３図の如くなる。Further, the implemented functions are shown in a block diagram of signals and power supplies as shown in FIG.
この第３図は、第１図、第２図に示す筐体並にマザーボ
ードの配置を示すブロック線図で、ひとつのマザーボー
ドの上下にＣＮＡ−旧、ＣＮＡ−８２を配し１Ｍヨを実
装できる構成としている。This Figure 3 is a block diagram showing the arrangement of the motherboard as well as the chassis shown in Figures 1 and 2. CNA-old and CNA-82 are placed above and below one motherboard, and 1M yo can be mounted. It is structured as follows.
また１本実施例は、シングルの計算機システムでは１−
Ａのみを使用でき全体的にコンパクト化されると共に拡
張時は図中のＭＧ部八へＵＳ＾、Ｂと電源ｖｃｃのｏｖ
側の結合を行うプリントボードをＭＯの代りに実装しＣ
Ｐ Ｕ ｎを除去すれば、１−Ｂ部は拡張スペースとな
る。In addition, in this embodiment, in a single computer system, 1-
Only A can be used, making the overall structure more compact, and when expanding, the MG section 8 in the figure can be connected to US^, B and the power supply vcc.
Mount a printed board that connects the sides in place of the MO.
If P Un is removed, the 1-B section becomes an expanded space.
したがって、本実施例によれば、いずれも単純な手法で
目的を十分達することができる。Therefore, according to this embodiment, the objectives can be fully achieved using a simple method.
以上説明したように１本発明によれば、シングルの計算
機システムで拡張スペースを機械的に増加することがで
きる。As explained above, according to the present invention, the expansion space can be mechanically increased in a single computer system.
また、本発明によれば、シングルの計算機システムでは
規模により全体をコンパクト化することができ、必要に
応じて拡張が簡単にできる。Further, according to the present invention, a single computer system can be made compact as a whole depending on the scale, and can be easily expanded as necessary.
第１図は本発明の計算機システムを構成する各種プリン
トボードの筐体への実装構造の筐体の一実施例を示す斜
視図、第２図は第１図のマザーボードの一実施例を示す
配置図、第３図は第１図。
第２図の信号および電源の関係をブロック線図的に示し
た一実施例を示す実装機態ブロック線図である。
１・・・構造物（筐体）、２・・・マザーボード、３・
・・各種プリン１−ボード、４−Ａ、４−Ｂ・・・電源
装置、ＣＮＡＭ、 ＣＮＢＭ・・・コネクタ。FIG. 1 is a perspective view showing an embodiment of a casing in which various printed boards constituting the computer system of the present invention are mounted on the casing, and FIG. 2 is a layout showing an embodiment of the motherboard shown in FIG. 1. Figure 3 is Figure 1. FIG. 3 is a mounting mechanism block diagram showing an embodiment in which the relationship between the signals and power supplies shown in FIG. 2 is shown in a block diagram. 1... Structure (housing), 2... Motherboard, 3...
...Various printers 1-board, 4-A, 4-B...power supply, CNAM, CNBM...connector.
Claims (1)
源装置をひとつの筺体に実装し、該筺体の上部並に下部
に、同様に実装した他の筺体を上下重ね合せた場合、上
部筺体の演算制御信号ならびに電源装置の出力電圧が各
筐体マザーボードの上下に設けたコネクタによつて結合
され下部筐体へ伝達されることにより、下部筺体に実装
された共有メモリの一方の信号ならびに操作電源として
作図するように実装したことを特徴とする計算機システ
ムを構成する各種プリントボードの筺体への実装構造。 ２、特許請求の範囲第１項記載のものにおいて、上記共
有メモリに代り２組の演算制御信号ならびに電源装置の
ＯＶ側を短絡するためのプリントボードを実装すること
により各種ＣＥの実装スペースを拡張できるようにした
ことを特徴とする計算機システムを構成する各種プリン
トボードの筺体への実装構造。[Claims] 1. A set of arithmetic control units, various interfaces, and a power supply device are mounted in one housing, and other housings similarly mounted are stacked on top and bottom of the housing. In this case, the arithmetic control signals of the upper case and the output voltage of the power supply unit are combined by the connectors installed on the top and bottom of the motherboard of each case and transmitted to the lower case, so that the shared memory mounted on the lower case is A structure for mounting various printed boards constituting a computer system in a housing, characterized in that they are mounted so as to be plotted as one signal and an operating power source. 2. In the device described in claim 1, the mounting space for various CEs is expanded by mounting a printed board for short-circuiting two sets of arithmetic control signals and the OV side of the power supply device instead of the shared memory. A structure for mounting various printed boards constituting a computer system in a housing, characterized by the following:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61100975A JPS62257511A (en) | 1986-05-02 | 1986-05-02 | Mounting structure for various printed board constituting computer system to case |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61100975A JPS62257511A (en) | 1986-05-02 | 1986-05-02 | Mounting structure for various printed board constituting computer system to case |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62257511A true JPS62257511A (en) | 1987-11-10 |
Family
ID=14288351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61100975A Pending JPS62257511A (en) | 1986-05-02 | 1986-05-02 | Mounting structure for various printed board constituting computer system to case |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62257511A (en) |
-
1986
- 1986-05-02 JP JP61100975A patent/JPS62257511A/en active Pending
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