JPS6229657U - - Google Patents
Info
- Publication number
- JPS6229657U JPS6229657U JP11987285U JP11987285U JPS6229657U JP S6229657 U JPS6229657 U JP S6229657U JP 11987285 U JP11987285 U JP 11987285U JP 11987285 U JP11987285 U JP 11987285U JP S6229657 U JPS6229657 U JP S6229657U
- Authority
- JP
- Japan
- Prior art keywords
- counter
- detection circuit
- output
- counts
- counting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
Description
第１図は本考案の一実施例の構成を示すブロツ
ク図。第２図は本考案の一実施例の作用の説明に
供する波形図。
１……水晶発振器、２，８および１１……カウ
ンタ、３および９……フリツプフロツプ、６……
ローパスフイルタ、７および１３……Ｄフリツプ
フロツプ。
FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a waveform diagram for explaining the operation of an embodiment of the present invention. 1...Crystal oscillator, 2, 8 and 11...Counter, 3 and 9...Flip-flop, 6...
Low pass filter, 7 and 13...D flip-flop.
Claims (1)
固定周波数の発振器出力を計数する第１カウンタ
および前記第１カウンタの計数値が所定値以上と
なつたことを検出する検出手段からなる所定周波
数信号検出回路と、前記所定周波数信号検出回路
からの検出出力によつて動作して前記入力信号を
所定数計数しかつその計数終了によつて動作を停
止する第２カウンタと、前記第２カウンタの動作
期間中、前記発振器出力を計数しかつ計数終了時
の計数値を出力する第３カウンタとを備えたこと
を特徴とする相対速度検出回路。 A predetermined frequency signal comprising a first counter whose operation and non-operation are controlled by an input signal and which counts the output of a fixed frequency oscillator, and a detection means which detects that the count value of the first counter has exceeded a predetermined value. a detection circuit; a second counter that is operated by a detection output from the predetermined frequency signal detection circuit to count a predetermined number of the input signals and stops operating upon completion of counting; and an operation of the second counter. A relative speed detection circuit comprising: a third counter that counts the oscillator output during the period and outputs a count value at the end of counting.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11987285U JPS6229657U (en) | 1985-08-06 | 1985-08-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11987285U JPS6229657U (en) | 1985-08-06 | 1985-08-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6229657U true JPS6229657U (en) | 1987-02-23 |
Family
ID=31007655
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11987285U Pending JPS6229657U (en) | 1985-08-06 | 1985-08-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6229657U (en) |
-
1985
- 1985-08-06 JP JP11987285U patent/JPS6229657U/ja active Pending
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