JPS6231861B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sweep signal generating device that stably generates the frequency of a sweep signal in, for example, an RF band by varying the set frequency.

First, we will define the terms sweep signal and sweep repetition signal. A sweep signal refers to a signal having a swept arbitrary frequency range, and a sweep repetition signal refers to a signal that repeatedly sweeps the sweep signal.

Conventionally, in order to generate a sweep frequency corresponding to the RF band, a stable sweep signal oscillator corresponding to the IF band is used to configure a phase-locked loop (PLL), and the frequency range of this sweep signal oscillator is continuously varied by the width of the frequency range. did
There was one that generated a sweep of frequencies equivalent to the RF band.

FIG. 1 is a block diagram of a conventional sweep signal generator. In this figure, 1 is a sweep signal oscillator, which is swept by a sweep repetition signal, e.g.
IF band (70MHz±20MHz). It generates a frequency. A reference oscillator 20 generates a preset frequency (for example, 1 GHz) and is composed of the following parts. That is, 2 is a variable local oscillator, which is composed of a VCO and the like. Reference numeral 3 denotes a driving waveform generator, which is composed of, for example, a DA converter, and generates a stepped driving waveform to drive the variable local oscillator 2. A counter 4 counts the oscillation frequency of the variable local oscillator 2. 5 is the central processing unit (CPU)
For example, the microprocessor is configured to calculate the difference between a preset frequency and the frequency counted by the counter 4, and the difference is applied to the variable local oscillator 2.
The frequency is controlled by feedback. 6 is a frequency controlled oscillator, for example, it is composed of a YIG tuned oscillator.
Sweep oscillation in the RF band, for example, a frequency of 4 GHz ± 20 MHz. 7 is a driving waveform generator, for example DA
It is composed of a converter and drives a frequency controlled oscillator 6. 8 is a harmonic mixer which outputs an intermediate frequency signal by adding the output of the frequency control oscillator 6 to one input terminal and adding the output of the variable local oscillator 2 of the reference oscillator 20 to the other input terminal. 9 is a phase difference detector;
It receives the intermediate frequency output from the harmonic mixer 8 and the frequency swept from the sweep signal oscillator 1, compares their phases, and feeds back the difference output to the frequency control oscillator 6 for phase synchronization. Forming a PLL.

In this way, the PLL method can improve frequency stability, but if the range of change exceeds the PLL pull-in range when the set frequency is changed, frequencies other than those generated before or when the set frequency is changed A frequency occurs momentarily (this is called a frequency jump). If a sweep signal generator that causes this frequency jump is used to measure a microwave line, for example, there may be problems such as when the frequency jump occurs, the signal of the frequency generated by it jumps into the adjacent channel and interferes with the operating line. It was hot.

The present invention has been made in view of these problems, and provides a sweep signal generator that stably generates a sweep signal frequency corresponding to the RF band without causing a so-called frequency jump even when the set frequency is changed. It's about doing.

This invention will be explained below with reference to the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention. In this figure, numeral 30 is a voltage holder, which is composed of, for example, an analog switch and a capacitor, and a phase difference detector 9 that is added to the frequency controlled oscillator 6.
Turn off the output from the analog switch, and
The output of the phase difference detector 9 before the disconnection is charged to the capacitor connected between the output terminal of the analog switch and the ground, and this charged holding voltage is applied to the frequency controlled oscillator 6 to generate the controlled oscillator. Keep the oscillation frequency of 6 at the frequency before the disconnection. Reference numeral 40 denotes a central processing unit (CPU), for example, a microprocessor, which calculates the difference between a preset frequency and the frequency counted by the counter 4, and converts the difference into a variable local oscillator 2.
In addition to the process of feeding back to the frequency control oscillator 6 and controlling the frequency, the difference between the next set frequency generated from the frequency control oscillator 6 and the previously set frequency is calculated, and the difference is used for phase synchronization of this sweep signal generator. When the loop pull-in frequency range is exceeded, a first control signal is output that causes the voltage holder 30 to turn off before generating the next set frequency from the frequency controlled oscillator 6. Reference numeral 50 denotes a voltage holding controller which generates the next set frequency from the frequency control oscillator 6 when the voltage holding controller 30 is in an off state, and then controls the voltage holding controller 30 after generating the next set frequency from the frequency control oscillator 6.
A second control signal is output for feeding back the output of the phase difference detector 9 to the frequency control oscillator 6 for phase synchronization. The voltage holding controller 50 is composed of the following parts. That is, 51 is a phase shifter that delays the phase of the IF signal output from the sweep signal oscillator 1 by, for example, 90 degrees. A phase difference detector 52 receives the intermediate frequency output from the harmonic mixer 8 and the signal frequency from the phase shifter 51, compares the phases, and detects and outputs the difference. 53 is a comparator, to which a preset DC voltage is applied to one input terminal, and to the other input terminal a phase difference detector 52 is applied.
When the voltage holder 30 is in an off state, the next set frequency is generated from the frequency control oscillator 6, and then the voltage is output and the voltage holder 30 is disconnected. . Next, the operation will be explained. The driving waveform generator 3 is operated in response to a command from the CPU 40, and the variable local oscillator 2 is driven to generate a signal of a preset frequency. On the other hand, the drive waveform generator 7 is operated according to a command from the CPU 40, the frequency control oscillator 6 is operated, and one input terminal of the harmonic mixer 8 is added.
The output of the variable local oscillator 2 is applied to the other input terminal, the intermediate frequency signal output from the harmonic mixer 8 is applied to one input terminal of the phase difference detector 9, and the voltage holding controller 50 is configured. Phase difference detector 52
Add to one input end of . The frequency of the sweep signal from the sweep signal oscillator 1 is added to the other input terminal of the phase difference detector 9, the phases are compared, and the output is sent to the voltage holder 3.
0 to the frequency controlled oscillator 6 to form a PLL. Therefore, the frequency of the sweep signal of the frequency controlled oscillator 6 is ₀ , the frequency of the sweep signal of the sweep signal oscillator 1 is ₁ , the oscillation frequency of the variable local oscillator 2 of the reference oscillator 20 is ₂ , and the harmonic order of ₂ is The harmonic order of n, ₀ and ₁ is 1
Then ₀ = n ₂ + ₁ or ₀ = n ₂
- The sweep frequency ₀ outputted from the frequency control oscillator 6 as ₁ is the frequency swept from the sweep signal oscillator ₁ above or below the frequency 2 set in the reference oscillator ₂₀ or its harmonic frequency n2. Sweep oscillation is performed with a width of ₁ .

Now assume that the frequency control oscillator 6 is generating a frequency of ₀₁ . Next, when the frequency ₀₂ is set, the CPU 40 calculates the difference between ₀₁ and ₀₂ , and when the difference exceeds the pull-in frequency range of the phase-locked loop of this sweep signal generator, outputs a control signal and controls the frequency. The gate holder 30 is turned off before the oscillator 6 generates a frequency of ₀₂ . Thereafter, the drive waveform generator 7 is operated according to a command from the CPU 40, and the frequency control oscillator 6 is driven to generate a frequency of ₀₂ . After a frequency of ₀₂ is generated, the voltage holder 30 is disconnected by the control signal from the voltage holder controller 50, and the output of the phase difference detector 9 is fed back to the frequency control oscillator 6 via the voltage holder 30. Synchronize the phase.

As explained above, when there is a so-called frequency jump, the phase-locked loop is temporarily cut off before it occurs, and the phase-locked loop is reconfigured when the next frequency occurs, so the set frequency can be changed. If the width of the change exceeds the pull-in range of the PLL, the effect is to prevent the generation of frequencies other than those that occur before or when the change is made, and to always generate only the set frequency with good stability. be.

Note that the embodiment of the present invention for generating a control signal to disconnect the voltage holder and release the disconnection is not limited to what has been described herein, and may be implemented with various modifications without changing the gist. can do.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional sweep signal generator, and FIG. 2 is a block diagram showing an embodiment of the present invention. 30 is a voltage holder, 40 is a CPU, 50 is a voltage holding controller, 51 is a phase shifter, 52 is a phase difference detector, 53 is a comparator, and is an intermediate frequency signal.

Claims (1)

[Claims] 1. A frequency controlled oscillator, a harmonic mixer that receives the output of the frequency controlled oscillator and the output of a reference oscillator that oscillates at a preset frequency and outputs an intermediate frequency signal, and a sweep repeater. a phase difference detector for comparing the phases of a frequency signal swept by the signal and having an arbitrary bandwidth with the output of the harmonic mixer, and feeding the output back to the frequency controlled oscillator for phase synchronization. In the sweep signal generator, the output from the phase difference detector applied to the frequency controlled oscillator is cut off, and the output voltage of the phase difference detector before the cutoff is held, and this held voltage is applied to the frequency control oscillator. a voltage holder for applying to the oscillator; when the difference between the next set frequency generated from the frequency control oscillator and the previously set frequency exceeds a pull-in frequency range for phase synchronization, the frequency control a first gate holding control means for turning off the voltage holder before generating the next set frequency from the oscillator; and second voltage holding control means for releasing the voltage holding circuit and feeding back the output of the phase difference detector to the frequency control oscillator for phase synchronization after generating the set frequency. A sweep signal generator characterized by: