JPS6232649B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power line carrier device that transmits and receives high frequency carrier signals via a three-phase power line.

FIG. 1 is a block diagram showing the configuration of a conventional power line carrier using a general single-phase AC power source, in which a transmitter 1 and a receiver 2 are both connected to a power line 3 of 100 V AC. When a switch is operated in the transmitter 1, a start signal, an address signal, and a control signal are sequentially transmitted as shown in Fig. 2, and the receiver 2 receives and decodes the carrier wave that is transmitted superimposed on the AC power supply voltage. The load 4 connected to the receiver 2 is controlled by the receiver 2. At this time, when the AC half-wave period is divided into four, a carrier signal is always present at the second position, and this constitutes a line usage indicator bit indicating that transmission is in progress. It is something. Therefore, while this line use indication bit is output, other transmitters 1 connected to the same line do not operate, thereby avoiding interference. Next, FIG. 3 is a block diagram showing the overall configuration of a conventional three-phase AC power line carrier system, in which each of the R, S, and T phases has transmitters T ₁ , T ₂ , and T ₃ are connected.
If the carrier signal transmitted from the transmitter _T3 connected to the R phase is now received by the receiver 2 connected to the R phase, the signal is normally received as shown in Figure 4b. , it is originally unknown to which phase the receiver 2 is connected, so if the receiver 2 connected to another phase tries to receive the carrier signal in synchronization with the zero-crossing signal of the power supply voltage of that phase. , as shown in Fig. 4c and d, the signal cannot be regenerated normally.Therefore, as shown in Fig. 6b, a three-phase lock signal LK is conventionally sent out before sending out the start signal, and the transmitter The phases of receiver 1 and receiver 2 were matched. In other words, the half-wave of the AC power supply voltage is divided into eight parts, the data "00111111" is superimposed thereon, this is used as the three-phase lock signal LK, and then the normal start signal ST, address signal AD, and control signal CD are sent out. do. Here, "0" indicates that there is no carrier signal, and "1" indicates that there is a carrier signal. The receiver 2 divides the AC half-wave period into eight parts and checks whether there is a carrier signal in each divided section. Now, when a signal is being transmitted in the R phase, the receiver 2
is connected to the R phase, the signal of each section divided into eight becomes "00111111" as shown in FIG. 4b. Further, assuming that the receiver 2 is connected to the S phase and the T phase, the signals of each section divided into 8 are "11?0?111" and "11111?0" as shown in FIG. 4c and d, respectively. ?”.
Here, "?" indicates that it is unclear whether the state of the carrier signal is "1" or "0". In this way, by detecting the position of the section where the signal is "0", it is possible to determine whether the zero cross position on the transmitter 1 side is the same as the zero cross position on the receiver 2 side, delayed by 120 degrees, or Since it is possible to know whether the carrier signal has advanced by 120 degrees, by delaying the zero-cross synchronization pulse on the receiver 2 side by that amount, the carrier signal can be received correctly.

However, if we consider the case where the three-phase lock signal LK transmitted from the R phase as shown in Fig. 5a and b is received by the receiver 2 connected to the S phase as shown in Fig. When the wave period is divided into eight, the fourth position is "0", and the third and fifth positions are undefined "?". By the way, this third
As mentioned above, the 4th and 4th positions are the so-called line use indication bits to indicate that the line is being used.If the signal in this line use indication bit is not recognized correctly, one transmitter will Machine 1
Even though the transmitter 1 is currently transmitting, other transmitters 1 cannot tell that it is, and the two transmitters 1 may send out signals at the same time, causing interference. It is something.

The present invention has been made in order to eliminate such drawbacks of the conventional example, and prevents malfunctions such as signals being transmitted simultaneously from two or more transmitters connected to a three-phase AC power line. It is an object of the present invention to provide a power line transport device that can prevent such problems.

The configuration of the present invention will be explained below based on illustrated embodiments. FIG. 7 is a block diagram showing the configuration of a transmitting/receiving device that integrates the transmitter 1 and receiver 2 of the power line carrier device according to the present invention. In the figure, reference numeral 5 denotes a zero-cross detection circuit, which is connected to the AC power line 3 and outputs a zero-cross synchronization pulse synchronized with the zero-cross point of the power supply voltage. 6 is 3
It is a phase delay circuit, and under the control of the transmission/reception control section 7, it passes the zero-cross synchronization pulse as it is, or changes the phase of the zero-cross synchronization pulse by 120 degrees.
The delay can be selectively delayed by 240° or 240°. Reference numeral 8 denotes a basic clock oscillation section, which is composed of, for example, a 100 KHz oscillation circuit, and generates basic clock pulses for synchronizing the entire circuit. The basic clock pulse output from the basic clock oscillator 8 is input to a frequency dividing counter 9 which is reset by the output pulse from the three-phase delay circuit 6.
The number of pulses is counted. When a predetermined period of time elapses after the output pulse of the three-phase delay circuit 6 is output, a carry output is output from the frequency division counter 9, and this carry output is sent to the received data processing unit 11 via the OR circuit 10. This is what is entered in the . The received data processing section 11 classifies the received data from the modulation/demodulation section 12 into AC half-waves, and identifies the start signal ST, address signal AD, data signal CD, etc. Both the reception data processing section 11 and the transmission data creation section 16 are controlled by the transmission/reception control section 7 to transmit and receive carrier signals to and from the AC power line 3 via the modulation/demodulation section 12. be. 13
is an operation switch for controlling the start of transmission, and when this operation switch 13 is pressed as shown in FIG. 6a, flip-flops 14 and 15 are set and their Q output becomes H level. The flip-flop 14 operates after the operation switch 13 is pressed until the three-phase locking operation is completed, as shown in FIG.
The Q output is held at H level from when is pressed until the end of transmission, and these flip-flops 14 and 15 are both controlled by the transmission/reception control section 7.
It is reset by .

The operation of the present invention will be explained below. First, the transmitter 1 sends out a three-phase lock signal LK before sending out the start signal ST. This three-phase lock signal LK is a signal whose carrier signal presence/absence status becomes "00111111" when an AC half wave is divided into eight. receiver 2 in the case
is connected to the R phase, the received data on the AC half wave is the same as on the transmitting side,
It becomes “00111111”. On the other hand, if the receiver 2 is connected to the S phase or T phase, the received data on the AC half wave is different from that on the transmitting side, and the "0" section where there is no carrier signal is delayed by 120 degrees or 120 degrees. You can either move on or move on. Therefore, the delay phase angle of the three-phase delay circuit 6 changes to 0 depending on where the "0" position where the carrier signal does not exist is located.
By setting the angle to either 120°, 120°, or 240°, a three-phase lock is achieved between the transmitter 1 and the receiver 2.

By the way, as shown in Figure 8a, the AC half-wave period separated by zero cross pulse ZP is 4.
If it is divided, the carrier wave is not weighted in the first section "a". That is, as shown in FIG. 2, in the start signal ST, address signal AD, and control signal CD, there is no carrier signal in the first section "a" and the signal is always "0".
It is in a state of On the other hand, the second section "b" is a bit for indicating line usage and is always in the state of "1". Therefore, by looking at this second section "b", it is possible to determine whether or not another transmitter 1 is transmitting a carrier signal, so after checking whether there is a carrier signal in this section, By starting transmission, it is possible to prevent a situation in which two transmitters 1 transmit at the same time. The third section "c" and the fourth section "d" are sections for carrying data, and if both sections "c" and "d" are both at H level, they indicate data "1", and conversely, both are at L level. If it is level, it indicates data "0". Also, when one of the sections "c" and "d" is at H level and the other is at L level, the start signal ST
It is beginning to show that

However, in the present invention, when determining whether or not transmission is possible at the start of transmission, it is also checked whether a carrier signal exists in the section "a", and other transmitters 1 perform transmission operation. It is arranged so that it can be detected even at the timing of the interval "a". FIG. 8 is a time chart showing the operation. When the operating switch 13 is pressed, a set pulse is output as shown in FIG. 8b, and the Q output of the flip-flop 14 becomes H level as shown in FIG. Until the phase lock is completed, the output of the OR circuit 10 is always at the H level as shown in FIG. 8e. This causes the received data processing section 11 to send out a test timing signal indicating that the line is always in use to test whether or not a carrier wave exists. Therefore, in the section "a" as well, the line is being used. Therefore, even if the carrier signal cannot be detected in section "b" due to different phases, it is now possible to detect that the transmitter 1 of the other phase is transmitting in section "a". There is. However, when it is determined that the other transmitter 1 is not transmitting,
After the transmission of the three-phase lock signal LK is completed, the flip-flop 14 is reset, and the received data processing section 11
During this period, the verification timing pulse during line use as shown in FIG. The received data processing section 11 is designed not to be affected even by noise.

The present invention is configured as described above, and includes a line monitoring means, which detects the presence or absence of a carrier signal on the power line at the start of transmission and determines whether or not transmission is possible, in a transmitter to which a plurality of three-phase power lines are connected; A three-phase lock signal sending means is provided for adding a three-phase lock signal to the leading side of the data signal at the start of transmission, and the transmitter receives the lock signal in a receiver connected to at least one phase of the three-phase power line. In a power line carrier equipped with a 3-phase locking means for synchronizing the phase of the zero-cross synchronization pulse of the receiver, the line monitoring means is normally kept inactive during the period in which the 3-phase lock signal does not exist during an AC half cycle, and the transmission is stopped. Since the transmitter is equipped with a monitoring level switching means that puts the line monitoring means in operation during the entire AC half cycle at the start, the first transmitter connected to any one phase of the three-phase power line When starting a transmission, the carrier can be detected at any part of the AC half-cycle where it is present, and therefore even if the carrier is present from a second transmitter connected to another phase. Even if the interval in which the carrier signal becomes zero corresponds to the timing for checking the usage status of the line in the first transmitter, it is possible to reliably detect that the line is in the usage status. It has the advantage of being able to prevent interference caused by signals being sent out from two or more transmitters at the same time, and it also has the advantage of preventing interference from occurring when signals are sent out from two or more transmitters at the same time. Since it is made to be in a non-operating state, it has the advantage that even if noise occurs during this period, it will not be affected by the noise.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional single-phase AC power line carrier, Figures 2a and b are waveform diagrams showing the same operation, and Figure 3 is a conventional three-phase AC power line carrier. A block diagram showing the configuration of the
- d and FIGS. 5 a to c are waveform diagrams showing the same operation as above, FIGS. 6 a to d are waveform diagrams showing the operation of the present invention,
FIG. 7 is a block diagram of one embodiment of the present invention, and FIGS. 8 a to 8 e are waveform diagrams showing the same operation. 3 is the power line, 5 is the zero cross detection circuit, 6 is 3
A phase delay circuit, 10 is an OR circuit, and 14 and 15 are flip-flops.

Claims (1)

[Claims] 1. A plurality of transmitters that transmit a carrier signal superimposed on an AC power supply voltage are connected to a three-phase power line, a receiver that receives the carrier signal and controls a load is connected to at least one phase of the three-phase power line, AC half cycle 4
No carrier signal is sent to the first divided section, and a carrier signal is always sent to the second section to indicate that the line is in use. data signal sending means for transmitting data; line monitoring means for detecting the presence or absence of a carrier signal on the power line at the start of transmission to determine whether transmission is possible; A three-phase lock signal sending means for adding an existing three-phase lock signal to the leading side of the data signal is provided in the transmitter, and a zero-cross detection circuit for outputting a zero-cross synchronization pulse of the phase to which the receiver is connected is provided in the receiver. , a 3-phase delay circuit that delays this zero-cross synchronization pulse by a phase that is an integral multiple of 1/3 cycle of the AC power supply voltage, and a 3-phase delay circuit that detects the timing when no carrier signal is included during reception of the 3-phase lock signal and synchronizes it with this timing. A power line carrier device comprising three-phase locking means for controlling a three-phase delay circuit so as to synchronize the phases of the zero-crossing synchronization pulses of the transmitter and receiver by comparing the timing of the zero-crossing synchronization pulse of the receiver. The method is characterized in that a monitoring level switching means is provided for normally keeping the line monitoring means in an inactive state in the first interval, and for setting the line monitoring means in an operating state for the entire interval of an AC half cycle at the start of transmission. Power line carrier equipment.