JPS6233557B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic device with a sound alarm function that can temporarily stop the sound produced at an alarm time and then continue sounding the sound.

Recently, it has become possible to link an electronic device, such as an electronic clock, with a recording device such as a tape recorder, and have it announce a melody that has been pre-recorded on the tape recorder at the alarm time, or information that needs to be done at the alarm time (meetings, going out, etc.). It is considered. However, it has been impossible to add the above-mentioned notification function by linking the above-mentioned tape recorder with a small-sized electronic device such as a wristwatch, or a thin small-sized electronic calculator with a clock function, since this would increase the size of the device. In addition, if you record multiple combinations of melodies and words announcing business (meetings, going out, etc.) as the recording content to be announced at alarm times, you can record the corresponding business in response to multiple alarm times. It is possible to make a melody sound before and after the voice notification. However, when using a tape recorder to record the melodies and messages broadcast, the melodies and messages are recorded in the order they are broadcast, so editing must be done using multiple tape recorders. The drawback was that the work was cumbersome. In addition, with conventional watches with a recording function, the time and volume of the sound emitted at the alarm time depend on the surrounding noise, environment, etc. When the surroundings are noisy, the sound of the pronunciation (speech) may not be heard even if it is known that it is being emitted. This resulted in inconveniences such as the ringing ending before you could understand it, or the ringing suddenly starting during a meeting, etc., and making it impossible to understand the rest of the content when you lowered the volume.

This invention was made in view of the above points,
The purpose is to provide an electronic device with a sound reporting function that can temporarily stop the melody or business (meeting, going out, etc.) that is sounded at the alarm time, and then make the subsequent melody or business sound again. It is in.

Hereinafter, one embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an overall block diagram of an electronic device with a recording function, such as an electronic wristwatch. In the figure, reference numeral 11 denotes an oscillation circuit, and a reference frequency signal outputted from the oscillation circuit 11 is divided into a signal having a cycle of, for example, 1 second via a frequency dividing circuit 12, and is input to a clock circuit 13. This clock circuit 13 counts the input one-second signals and obtains time information of "hours", "minutes" and "seconds". The time information counted by the clock circuit 13 is sent to the display section 14 and displayed. The clock circuit 13 has a counter that stores the alarm time, and outputs an alarm coincidence signal AL to the recording control section 15 when the current time counted by the clock circuit 13 matches the alarm time. The detailed configuration of this recording control section 15 will be described later using FIG. 2. Operation signals of various switches provided in a switch section 16 are inputted to this recording control section 15. The detailed structure of this switch section 16 will be described later using FIG. 2. Then, the recording control section 15 sends out a signal specifying a display such as "fast forward" or "slow forward" on the display section 14. Further, the recording control section 15 sends the clock selection signal to the clock selection section 17.
Then, the increment designation signal a and the reverse designation signal b of the counter are sent to the address section 18, and the read/write signal R/
W ₁ to RAM (Random Access Memory) 19
The read/write signal R/W ₂ is stored in the temporary storage unit 20.
, the operation signal C is sent to the encoding circuit 21, and the operation signal d is sent to the encoding circuit 21.
are output to the encoding circuit 22 in parallel. The reference frequency signal outputted from the oscillation circuit 11 is frequency-divided in the clock selection section 17 based on the clock selection signal and sent to the address section 18 as a predetermined clock signal. This address section 18 receives the clock signal and the step designation signal a.
Alternatively, a count-up or count-down address designation signal is sent to the RAM 19 based on the reverse designation signal b. Further, this addressing signal is sent to the decoder 23, and the address of the RAM 19 specified by the address section 18 is displayed on the display section 14. Thus, the audio input from the microphone 24 is converted into a digital signal via the A/D conversion circuit 25 and input to the encoding circuit 21. This encoding circuit 21 encodes the input digital signal and converts it into audio information.
Output to RAM19. The output terminal of this RAM19
A data bus is connected from OUT to the temporary storage section 20. Furthermore, from this temporary storage unit 20, the above
A data bus is connected to the input terminal IN of the RAM 19. Further, the audio information output from the RAM 19 is encoded by the encoding circuit 22 and input to the audio signal synthesis circuit 26. The audio signal synthesis circuit 26 then outputs the synthesized audio signal to the speaker 27.

Next, FIG. 2 shows the detailed configuration of the recording control section 15 and the switch section 16. In the figure, the switch unit 16 includes a pause switch S ₁ , a transfer switch S ₂ , a write switch S ₃ , an execution switch S ₄ ,
Equipped with mode selection switch _S5 . switch
The operation signal of _S1 is input to the one shot circuit 31. The one-shot pulse output from the one-shot circuit 31 is input to a T-type flip-flop 32 and AND circuits 33a and 33b, respectively. Furthermore, the output signal Q of this flip-flop 32 is applied to the AND circuit 33a, and the output signal of the flip-flop is applied to the AND circuit 33b.
is input. The output signal of the AND circuit 33a is input to the AND circuit 34, and the output signal of the AND circuit 33b is input to the reset terminal R of the R-S type flip-flop 35. Further, the clock circuit 13
The alarm coincidence signal AL outputted from is inputted to the AND circuit 34 and the OR circuit 36, respectively. Here, the operation signal of the switch _S1 is input to the OR circuit 36. The output signal of the AND circuit 34 is input to the set terminal S of the flip-flop 35. And flipflop 3
The output signal of 5 and the output signal of the OR circuit 36 are input to an AND circuit 37. The above AND circuit 37
The output signals of are input to OR circuits 38 to 40, respectively. Next, the operation signal of the switch _S2 is input to the OR circuit 41. Further, the operation signal of the switch _S3 is sent to the encoding circuit 21 as an operation signal C, and is also input to the OR circuit 41. and,
The output signal of this OR circuit 41 is sent to the RAM 19 as a read/write signal R/W ₁ , and is also input to the OR circuits 39 and 40. moreover,
The operation signal of the switch _S5 is input to the one shot circuit 42. And this one shot circuit 42
The one shot pulse outputted from the hexadecimal counter 43 is inputted to the hexadecimal counter 43. Furthermore, hexadecimal counter 43
The above switch S ₅ is connected to the output lines "1" to "5" of
A "1" signal is sequentially sent out by the operation. Then, the output line "1" of this hexadecimal counter 43 ~
“5” is connected to the display unit 14. In addition, the above 6
Signals on output lines "1" to "5" of the advance counter 43 are input to a decoder 44. The signals on output lines l ₁ to _{l 4} of this decoder 44 are sent to the clock selection section 17. Furthermore, the signals on the output lines _l1 and _l2 of the decoder 44 are sent to the OR circuit 39, and the signals on the output lines _l3 and _l4 are sent to the OR circuit 45.
is input. Furthermore, the signal on the output line _l5 of the decoder 44 is the read/write signal R/ _W2.
The signal is sent to the temporary storage section 20 as well as to the OR circuits 38 to 40. Next, the operation signal of switch _S4 is sent to the decoder 44 as an enable signal. The output signal of the OR circuit 38 is sent to the encoding circuit 22 as an operation signal d, the output signal of the OR circuit 39 is sent to the address section 18 as a step designation signal a, and the output signal of the OR circuit 45 is sent as a reverse designation signal. b is sent to the address section 18. In addition, the output lines l ₁ to _{l 4} of the decoder 44
“Fast forward” when a “1” signal is sent from
``Delayed forward'', ``early return'', and ``late return'' are specified. Further, when a "1" signal is output from the OR circuit 40, "normal" address increment is performed.

Next, FIG. 4 is a diagram showing the arrangement of segment electrodes of the display section 14. In the same figure, 14a to 14
c is a digital display that displays "hours", "minutes" and "seconds"; 141 to 144 are RAM from address section 18;
This is an indicator showing the speed of count-up or count-down of the addressing signal sent to 19.

Next, the operation of the present invention configured as described above will be explained. First, the reference frequency signal output from the oscillation circuit 11 is passed through the frequency dividing circuit 12 to, for example, 1
The frequency of the signal is divided into a second period signal and input to the clock circuit 13. This clock circuit 13 counts the input one-second signals and obtains time information of "hours", "minutes" and "seconds".
The time information counted by the clock circuit 13 is sent to the display section 14 and displayed.

Next, a case will be described in which the audio input from the microphone 24 is stored in the RAM 19.
First, the write switch _S3 of the switch unit 16 is kept closed, and audio is input from the microphone 24. When the write switch _S3 is closed, the operation signal C is sent to the encoding circuit 21 via the OR circuit 41.
Write signal W ₁ to RAM 19, OR circuits 41 and 3
A step designation signal a is sent to the address section 18 via the address section 9, and a "normal" speed clock selection signal is sent to the clock selection section 17 via the OR circuits 41 and 40. Now, for example, if "meeting" is output as voice from the microphone 24, the voice is converted to a digital signal via the A/D conversion circuit 25 and input to the encoding circuit 21. The encoding circuit 21 encodes the input digital signal and sends it to the RAM 12. Here, the clock selection signal at the "normal" speed is sent to the clock selection section 17, and the write signal _W1 is sent to the RAM 19, so that the encoded audio information is sequentially written into the RAM 19. It can be done. Further, the address of the RAM 19 sent from the address section 18 is displayed on the digital display 14d of the display section 14. In the manner described above, "meeting" is stored in the RAM 19 as the voice announcing the alarm time. When the current time counted by the clock circuit 13 matches the alarm time preset in the clock circuit 13, an alarm coincidence signal AL is output to the recording control section 16. As a result, the operation signal d is sent to the encoding circuit 22 via the OR circuit 36, the AND circuit 37, and the OR circuit 38, the increment designation signal a is sent to the address section 18 via the OR circuit 39, and the " A clock selection signal of "normal" speed is sent to the clock selection section 17. As a result, the audio information stored in the RAM 19 is sequentially sent to the encoding circuit 22 based on the address designated from the address section 18, and is encoded in the opposite manner to that of the encoding circuit 21. Then, the signal encoded in the encoding circuit 22 is synthesized into a voice signal in the voice synthesis circuit 26 and sent to the speaker 27. As a result, speaker 27
``Meeting'' is announced.

The audio state set in the RAM 19 can be edited arbitrarily, for example, the address "50" displayed on the digital display 14d of the display section 14.
-Voice information stored in "60" For example, if you want to transfer "meeting" to addresses "20" to "30", operate mode selection switch _S5 to change the contents of hexadecimal counter 43 to "1". ”, then operate execution switch _S3 . As a result, the decoder 44
A "1" signal is output to the output line _l1 , and a "fast forward" clock selection signal is sent to the clock selection section 17. Further, a step designation signal a is sent to the address section 18 via the OR circuit 39, and the address designation signal for the RAM 19 output from the address section 18 is counted up in fast forward mode. The time at that time and the address specified from the address section 18 are displayed as shown in FIG. Then, when the specified address of the RAM 19 displayed on the digital display 14d of the display section 14 approaches "50", the mode selection switch _S2 is operated to select the hexadecimal counter 43.
After setting the contents to "2", operate execution switch _S4 . As a result, the address designation signal for the RAM 19 output from the address section 18 is counted up in a slow manner. Then, when the address displayed on the digital display 14d reaches "50", the operation of the execution switch _S4 is stopped. Then, operate the mode selection switch _S5 to select the hexadecimal counter 43.
After setting the content to "5", continue operating the execution switch _S3 until the address displayed on the digital display 14d becomes "60". As a result, a "1" signal is output from the output line _l5 of the decoder 44, a write signal _W2 is sent to the temporary storage section 20, an operation signal d is sent to the encoding circuit 22, an increment signal a is sent to the address section 18, and a clock selection section 17 A "normal" speed clock selection signal is sent to the clock. Therefore, the audio information "meeting" stored at addresses "50" to "60" displayed on the digital display 14d is written into the temporary storage section 20. Next, press the mode selection switch.
Operate _S5 to set the content of the hexadecimal counter 43 to "3" or "4" and operate the execution switch _S4 . As a result, the address designation signal output from the address unit 18 is fast-returning when the content of the hexadecimal counter 43 is "3", and slow-returning when the content is "4". Then, when the address displayed on the digital display 14d returns to "20", the transfer switch _S2 is operated. As a result, the write signal W ₁ is sent to the RAM 19 via the OR circuit 41, and the OR circuit 41,
39 to the address section 18, a step designation signal a,
A "normal" speed clock selection signal is sent to the clock selection section 17 via the OR circuit 40. As a result, the voice information "Meeting" stored in the temporary storage section 20 is transferred to the digital display 14.
It is forwarded to addresses "20" to "30" displayed in d. In addition, the digital display body 14d of the RAM 19
If you want to pre-store "Meeting" as audio information in addresses "60" to "70" and "telephone" as audio information in addresses "70" to "80" displayed in , and make the sound sound at the alarm time. When the audio information "Meeting" stored in the above addresses "50" to "60" was to be sounded at the alarm time, it was transferred to the addresses "20" to "30", but in the same way as in that case, 20” to “30”. Here, it is assumed that a melody to be sounded at the alarm time is stored in addresses "0" to "10" and "20" to "30" of the RAM 19. by the way,
As described above, if the user wishes to temporarily stop the sound while the audio information "Meeting" stored in advance in the RAM 19 is being sounded at the alarm time, the pause switch _S5 is operated. As a result, a one-shot pulse is output from the one-shot circuit 31 to the flip-flop 32. This flip-flop 32 is then set, and a one-shot pulse is input to the set terminal S of the flip-flop 35 via AND circuits 33a and 34. As a result, the flip-flop 35 is set, and a "0" signal is input to the AND circuit 37 as its output signal, and the gate of the AND circuit 37 is closed. This allows the alarm match signal to
Input to the AL OR circuits 38 to 40 is prohibited,
The audio report from the speaker 27 is temporarily stopped.
Next, when the alarm coincidence signal AL output from the clock circuit 13 is no longer input to the recording control section 15, when the pause switch _S1 is operated again, the output signal of the flip-flop 32 is inverted.
As a result, the gate of the AND circuit 33b opens, and the one shot pulse output from the one shot circuit 31 is applied to the reset terminal R of the flip-flop 35.
is input. As a result, flip-flop 3
5 is reset, and a "1" signal is input to the AND circuit 37 as the output signal of the flip-flop 35. When the switch _S1 is continuously closed, the operation signal is input to the OR circuits 38 to 40 via the OR circuit 36 and the AND circuit 37, and is not sounded until the pause switch _S1 is operated for the first time. The continuation of the voice that was heard will be played (this is the third part)
(See Figures A-G).

As described in detail above, in the present invention, a pulse signal is supplied to the address designation section according to the alarm signal output at the alarm time to reproduce the recorded content, and the supply of the pulse signal is stopped to record the recording. A switch is provided to temporarily stop the playback of the content, so the playback operation can be stopped midway, and the alarm signal will no longer be output after a certain amount of time has passed.
Even if the pulse signal is not supplied, if you operate the above switch again, the switch operation signal will send the pulse signal to the address designation section in the same way as the alarm signal as long as this switch is operated. Therefore, the playback of the recorded content can be restarted. Therefore, even if the recorded content starts playing in a noisy place, the user can go to a quiet place and listen to the recorded content at any time.

[Brief explanation of the drawing]

The drawings show one embodiment of the invention.
The figure is a block diagram of the entire electronic device with a sound reporting function, Figure 2 is a detailed diagram of the recording control section and switch section shown in Figure 1, and Figures A to G are diagrams for explaining the operation. FIG. 4 is a timing chart showing the arrangement of segment electrodes in the display section, and FIG. 5 is a diagram showing the display state of the display section. 11...Oscillation circuit, 15...Recording control section, 16
...Switch section, 17...Clock selection section, 18
...address section, 19...RAM, 20...temporary storage section, 27...speaker.

Claims (1)

[Claims] 1. A voice code storage means for encoding and storing the voice input from the outside into a voice code, an addressing means for specifying an address for the storage area of this voice code storage means, and a means for updating the address of this addressing means. A pulse signal generating means outputs a pulse signal, and a pulse signal from the pulse signal generating means is supplied to the addressing means based on an alarm signal output at an alarm time to read an audio code from the audio code storage means and generate a voice. a sound generation control means for causing a sound to be generated; an external pressure operation switch; and a sound generation control means for stopping the supply of the pulse signal by pressing the external pressure operation switch when the alarm signal is being outputted; a sound generation pause means for temporarily stopping the sound production; and a switch signal while the external press operation switch is being pressed after the output of the alarm signal is stopped, and a switch signal is supplied to the sound generation control means to generate the pulse signal. 1. An electronic device with a sound alarm function, characterized in that the electronic device is equipped with a sound generation restart means for causing the sound production control means to supply the sound and restart the sound production of the voice by the sound production control means.