JPS6234871U - - Google Patents
Info
- Publication number
- JPS6234871U JPS6234871U JP1985125309U JP12530985U JPS6234871U JP S6234871 U JPS6234871 U JP S6234871U JP 1985125309 U JP1985125309 U JP 1985125309U JP 12530985 U JP12530985 U JP 12530985U JP S6234871 U JPS6234871 U JP S6234871U
- Authority
- JP
- Japan
- Prior art keywords
- output
- charge
- detection circuit
- integrating
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 3
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
第１図はこの考案の一実施例を示す図、第２図
はこの実施例の各部信号波形を示す図、第３図は
従来の電荷検出回路を示す図、第４図は従来の電
荷検出回路の各部信号波形を示す図である。
図において、１は撮像素子、２は感光領域、３
は蓄積領域、４は読出しレジスタ、５は出力ゲー
ト、６はコンデンサ、７，８はＦＥＴ、９は負荷
抵抗、１０，１０ａ〜１０ｃはアナログスイツチ
、１１はコンデンサ、１２はアンプ、１３は抵抗
、１４はコンデンサ、１５はアンプ、１６はＡＤ
変換器、１７はデジタルビデオ信号、１８は出力
端である。なお、各図中同一符号は同一又は相当
部分を示す。
Fig. 1 is a diagram showing an embodiment of this invention, Fig. 2 is a diagram showing various signal waveforms of this embodiment, Fig. 3 is a diagram showing a conventional charge detection circuit, and Fig. 4 is a diagram showing a conventional charge detection circuit. FIG. 3 is a diagram showing signal waveforms at various parts of the circuit. In the figure, 1 is an image sensor, 2 is a photosensitive area, and 3
is a storage area, 4 is a read register, 5 is an output gate, 6 is a capacitor, 7, 8 are FETs, 9 is a load resistor, 10, 10a to 10c are analog switches, 11 is a capacitor, 12 is an amplifier, 13 is a resistor, 14 is a capacitor, 15 is an amplifier, 16 is an AD
Converter, 17 is a digital video signal, 18 is an output end. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
、基準レベルと、この基準レベルから出力電荷に
応じて充電あるいは放電がなされた信号レベルと
をくり返す電荷検出信号の、上記信号レベルを上
記１ビツト分毎にそれぞれ、サンブルホールドす
る手段と、このサンブルホールドする手段の出力
を一定時間積分する手段と、この一定時間積分す
る手段の積分出力をリセツトする手段とを備えた
ことを特徴とする電荷検出回路。 (2) 積分出力をリセツトする直前のタイミング
で積分出力をアナログ、デジタル変換する手段を
備えたことを特徴とする実用新案登録請求の範囲
第(1)項記載の電荷検出回路。[Claims for Utility Model Registration] (1) A charge that repeats a reference level and a signal level that is charged or discharged from this reference level according to the output charge for each bit of output from a charge transfer element. Means for sample-holding the signal level of the detection signal for each bit, means for integrating the output of the sample-holding means for a certain period of time, and means for resetting the integral output of the means for integrating for a certain period of time. A charge detection circuit comprising: (2) The electric charge detection circuit according to claim (1) of the utility model registration, characterized in that it is provided with means for converting the integral output from analog to digital at a timing immediately before resetting the integral output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985125309U JPS6234871U (en) | 1985-08-15 | 1985-08-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985125309U JPS6234871U (en) | 1985-08-15 | 1985-08-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6234871U true JPS6234871U (en) | 1987-02-28 |
Family
ID=31018095
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985125309U Pending JPS6234871U (en) | 1985-08-15 | 1985-08-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6234871U (en) |
-
1985
- 1985-08-15 JP JP1985125309U patent/JPS6234871U/ja active Pending
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