JPS6234879U - - Google Patents

Info

Publication number
JPS6234879U
JPS6234879U JP12667885U JP12667885U JPS6234879U JP S6234879 U JPS6234879 U JP S6234879U JP 12667885 U JP12667885 U JP 12667885U JP 12667885 U JP12667885 U JP 12667885U JP S6234879 U JPS6234879 U JP S6234879U
Authority
JP
Japan
Prior art keywords
output
mono multi
horizontal
monomulti
metastable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12667885U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12667885U priority Critical patent/JPS6234879U/ja
Publication of JPS6234879U publication Critical patent/JPS6234879U/ja
Pending legal-status Critical Current

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  • Television Signal Processing For Recording (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図面は全て本考案の一実施例に係り、第1図は
回路図、第2図は1/2Hスキユージヤンプ発生
時のタイミングチヤート、第3図は1/4Hスキ
ユージヤンプ発生時のタイミングチヤートである
。 2……第1モノマルチ、5……第2モノマルチ
、9……NORゲート、10……第3モノマルチ
、13……微分回路、17……フリツプフロツプ
。
The drawings all relate to one embodiment of the present invention; Fig. 1 is a circuit diagram, Fig. 2 is a timing chart when a 1/2H skew jump occurs, and Fig. 3 is a timing chart when a 1/4H skew jump occurs. It is. 2...First monomulti, 5...Second monomulti, 9...NOR gate, 10...Third monomulti, 13...Differential circuit, 17...Flip-flop.

補正 昭60.11.29 図面の簡単な説明を次のように補正する。 明細書第10頁第9行目と第10行目の間に下
記の文章を挿入する。 「また第4図はピクチヤーサーチ時のタイミン
グチヤートである。」
Amendment November 29, 1980 The brief description of the drawing is amended as follows. Insert the following sentence between lines 9 and 10 on page 10 of the specification. ``Also, Figure 4 is a timing chart during picture search.''

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 再生映像信号中の水平同期信号をトリガ入力と
して水平走査期間より短い準安定期間を有する第
1モノマルチと、前記第1モノマルチ出力に同期
して水平同期信号幅より長い準安定期間を有する
第2モノマルチと、前記第2モノマルチ出力にて
水平同期信号の通過を制御するゲート手段と、前
記ゲート手段出力をトリガ入力とし水平走査期間
よりも長い準安定期間を有する第3モノマルチと
、前記第3モノマルチ出力をセツト入力とし、ス
キユージヤンプ位置にて反転するフリツプフロツ
プよりなるスキユー検出回路。
a first monomulti, which has a metastable period shorter than the horizontal scanning period using a horizontal synchronization signal in a reproduced video signal as a trigger input; and a first monomulti, which has a metastable period longer than the width of the horizontal synchronization signal in synchronization with the first mono multi output. a gate means for controlling passage of a horizontal synchronizing signal at the output of the second mono multi, a third mono multi using the output of the gate means as a trigger input and having a metastable period longer than the horizontal scanning period; A skew detection circuit comprising a flip-flop which uses the third mono multi-output as a set input and inverts at a skew jump position.
JP12667885U 1985-08-20 1985-08-20 Pending JPS6234879U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12667885U JPS6234879U (en) 1985-08-20 1985-08-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12667885U JPS6234879U (en) 1985-08-20 1985-08-20

Publications (1)

Publication Number Publication Date
JPS6234879U true JPS6234879U (en) 1987-02-28

Family

ID=31020710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12667885U Pending JPS6234879U (en) 1985-08-20 1985-08-20

Country Status (1)

Country Link
JP (1) JPS6234879U (en)

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