JPS6236570B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sequence controller, and more specifically, it is equipped with a microprocessor, a memory, and a keyboard, a program is set in the memory by the keyboard, and when a step condition is met, the program is executed next. The present invention relates to a step-by-step sequence controller that uses a so-called "stoward program" method.

The present inventors set up and execute multiple series of programs in parallel, and linked a predetermined step of one series with a predetermined step of another series using an internal flag as a medium, thereby making it possible to create programs between different programs. We have proposed a sequence controller that can control the transition arbitrarily and according to the progress of the phenomenon. The present invention has been made in this regard.

An object of the present invention is to provide a step-by-step sequence controller that sets and executes multiple series (blocks) of programs in parallel. Conditions (SET-A, SET-B, SET-
The display content of the numeric display for displaying C) is
Single key (block increment key)
In the first state, each time the key is pressed, the blocks are moved in a predetermined order, for example, block W → block X → block Y.
When the key is pressed in block Y, the numeric display switches to the second state in which the step number of each block is displayed.
The object of the present invention is to provide a sequence controller which returns to the display related to block W when the key is pressed in this second state.

Hereinafter, an embodiment of the present invention in which three blocks are operated in parallel will be described with reference to the drawings.

FIG. 1 shows the configuration of a console front panel according to an embodiment of the present invention.

In the upper left corner is an input/internal flag indicator 1 that displays either the input signal or internal flag as a lamp.
An output display 2 for displaying the output signal with a lamp is provided at the upper right stage. There are 32 inputs and outputs numbered 01 to 32, and 16 internal flags numbered 33 to 48.The internal flag display also serves as the input display lamps numbered 01 to 16. are doing.

In the middle row, from the left, block display 3 displays the W, X, and Y blocks with lamps, step display 4 displays the step number numerically, TIM (time), CNT (count), AND, OR, JMP. (jump), RPT (repetition) SET, 2-OR/AND, etc., and the meaning of the three types of data A, B, and C for each operation are taught. A teaching board 6, data displays 7, 8, and 9 consisting of two-digit numerical displays that display the contents of operation data A, B, and C, and an operating status display that displays the operating status of the machine such as POWER and RUN. The lamps 10 are arranged in parallel.

A keyboard 11 is provided at the center of the lower stage. Types of keys include number keys 0 to 9, key to instruct timer "TIM", key to instruct counter "CNT", key to instruct AND logic "AND", key to instruct OR logic "OR", jump key. Key "JMP" to instruct repeat, key "RPT" to instruct repeat, key "SET" to instruct setting or resetting of internal flag, 2-AND or 2-OR
``2AND/OR'' key to instruct program termination, ``END'' key to instruct program termination, ``RET'' key to instruct to stop operation when external interrupt occurs, ``NOP'' key to instruct no operation, Key "NOT" to instruct inversion, key "W" to instruct data writing, key "OUT" to instruct output,
Key “RSET” to instruct process set, output
There are a key "ON" for instructing ON, a key "OFF" for instructing output OFF, a key "IR" for checking the state of internal flags, and a key "BLC-INC" 11A for instructing block switching. This key “BLC−
The function of "INC" 11A is the most important feature of the present invention and will be described in detail later.

A mode changeover switch 12 is provided at the lower right end. The modes selected by this switch 12 are "program mode" and "lock mode".
There are three types of "monitor mode". The program mode is used when setting a program from the keyboard 11 into the built-in memory. Lock mode is an operation mode used when executing control as a sequence controller, and only the "IR" and "BLC-INC" keys on the keyboard function effectively. Monitor mode is a mode used to monitor the program contents during control execution, and the keys on the keyboard are "IR" and "BLC-INC".
Only "PSET" and number keys function effectively.

FIG. 2 shows the electrical configuration of the embodiment of the present invention. The entire device consists of a microprocessor 21 and a bus line 22 connected to the microprocessor, with various module circuits and various memories connected thereto.

Each input signal from the keyboard 11 is converted into a code signal, temporarily stored in the key input interface 24, and sent to the data bus 221 by operating the "W" key. The display device 25 is the first
As explained in the figure, it is composed of an input/internal flag display 1, an output display 2, a block display 3, a step display 4, an operation display 5, and data displays 7, 8, and 9. Each of these displays is driven and controlled by a display interface 26 which takes in data from a data bus 221 in accordance with control signals from an address bus 222.

32 input terminals I ₁ to _{I 32} are input module 27
are connected to the input module 27, and are sequentially scanned by a data selector built into the input module 27, and the selected signals are sent to the data bus 221 and sent to the CPU 2.
1. The data selector is controlled by address bus 222.

Output signals sent from the sequence controller to the controlled object are outputted to 32 output terminals O ₁ to O ₃₂ via the output module 28 . The output module 28 has a built-in latch circuit with a 32-bit capacity corresponding to each output terminal line, and continues to maintain its output state until the step condition is satisfied. The output module 28 is controlled by the address bus 222 and operates by taking in signals from the data bus 221.

Also connected to the bus line 22 is a tape deck interface 34 for externally connecting an audio cassette type magnetic tape.

The memory consists of a system program area 29, a user program area 30, and a working area 31. The system program area 29 consists of read-only memory;
Various routine programs executed in cooperation with the CPU 21 are permanently stored. The user program area 30 is made up of a random access memory, and is an area that can be written or changed using the keyboard 11, and is made up of three program areas W, X, and Y, which will be described later. The working area 31 also consists of a random access memory, and is connected to the user program area 30 to W,
It consists of an area for extracting and temporarily storing only the program contents of the step being executed in each block X and Y, and internal flags Nos. 33 to 48.
The CPU 21 performs output control based on these contents. Note that the internal flags are controlled by programming and are used as step conditions in the same way as the inputs _I1 to _I32 .

The structure of the program command words stored in the user program area 30 is shown in FIG. This is an 8-bit instruction code 301 indicating the type of operation, SET-A, SET- indicating the step condition.
For the code 302 of 3 x 8 bits consisting of B, SET-C and 32 output terminals, it indicates whether the control command to be output after the step condition is satisfied is "ON" or "OFF". It consists of a 32-bit output setting code 303.
The contents of SET-A, SET-B, and SET-C are determined in advance depending on the type of operation, and some or all of them may be unnecessary depending on the type of operation. Therefore, when using an 8-bit memory, the number of required addresses changes depending on the type of operation.

The user program area 30 is composed of an area for storing a plurality of program command words shown in FIG. 3, and an example of the overall configuration thereof is shown in FIG. 4. That is, it is composed of W, X, and Y blocks, and each block is composed of 85 steps from step 01 to step 85.

The external control input 33 is composed of a block selection input and a control input, and these inputs are combined so that each block can be operated from the outside. Block selection inputs include "Block W,""BlockX," and "Block Y," and control inputs include "Reset,""Stop,""Step,""Start," and "Process Stop." The selected signal is sent to the data bus 221 and taken into the CPU 21.

An outline of the configuration of the CPU 21 is shown in FIG. A commercially available microprocessor can be used for this.

The CPU 21 includes a timing and control unit 211 including a clock generator, and an instruction decoder 21.
2. Program counter 2 for sending address signals to the instruction register 213, arithmetic unit 214, accumulator 215, and address bus 222.
16, an address buffer 217, a group of other registers 218, a data buffer 219 for sending and receiving data to and from a data bus 221, etc. In the group of registers 218, each program step of the sequence controller is stored. Process step counter 2 defined for each block
24. Clock counter 225 for each block;
Each block includes a counting counter 226 for counting the number of input pulse signals, and a block counter 227 consisting of a ternary ring for outputting WXY block control signals. Data bus 221 consists of 8 lines, and address bus 222 consists of 16 lines.

Next, how the contents of the instruction words of the user program shown in FIG. 3 are determined depending on the type of operation will be explained with reference to FIG. 6.

In the case of the "TIM" command for setting time, as shown in FIG. 6A, minutes are set in SET-A, seconds in SET-B, and 1/10 second in SET-C. Therefore, the time can be freely set from 0 to 99 minutes, 59 seconds, and 9 seconds.

In the case of the "CNT" command that sets the count value, the 6th
As shown in FIG. B, the input terminal number is specified in SET-A, and the count value is set in the four digits SET-B to SET-C. Therefore, a maximum of 9999 can be set.

In the case of the logical operation "AND" instruction, as shown in Figure 6C, input terminal numbers are specified for SET-A, SET-B, and SET-C, and the signal "1" arrives at all input terminals. When this happens, the step condition is satisfied.

For logical operation "OR" instruction, SET-A,
Input terminal numbers are designated for SET-B and SET-C, and the step condition is satisfied when a signal "1" arrives at any one input terminal.

In the case of jump "JMP" command, as shown in Figure 6D, the step condition is satisfied when the input signal of the input terminal number commanded to SET-A becomes "1", and then Jump to the specified step. In this command, SET-C and output setting area are not used.

In the case of a repeat "RPT" command, as shown in FIG. 6E, the number of repetitions to be repeated is initially set in SET-A, and the step number to be jumped next during repetition is set in SET-B. Also running CPU21
Under the control of , the contents of SET-A are decremented by -1 each time it is repeated. In this command,
SET-C and output setting area are not used.

In the case of an "END" command indicating the end of the program, the program immediately jumps to the step designated by SET-A, as shown in FIG. 6F. especially,
If the designated step of SET-A is number 0 or 1, the program will continue to start. In this command, SET-B, SET-C, and output setting areas are not used.

In the case of a "RET" command that specifies a return, or a "NOP" command that specifies a non-operation, as shown in Figure 6G and H, SET-A,
B, C and output setting areas are all unused.

Negative logic operation "NOT" instruction is not used alone, but "AND", "OR", "CNT", "JMP", "SET"
It is used in conjunction with other commands related to input such as, and is used to modify the input signal. That is, the sixth
As shown in FIG. I, the input states "1" or "0" of the input terminal numbers designated as SET-A, B, and C are inverted and logically operated.

In the case of the "SET" command that sets internal flags according to input conditions, as shown in Figure 6 J,
Specify the input terminal number in SET-A, SET-B,
Specify the internal flag number in SET-C.
When used in conjunction with "NOT", it becomes a command to reset the internal flag, and the decimal point of data display 8 or 9 lights up to display this.

FIG. 7 shows an excerpt of the main part of a program sheet for WXY, 3-block parallel operation according to the above embodiment, and FIG. 8 shows an explanatory diagram of its operation.

Link operations between blocks are performed by using the state of internal flags as step conditions for each block. When the input condition of SET-A is 00 in the "SET" command, SET-B, SET are unconditionally
-The internal flag specified by C is set or reset. Therefore, when internal flags 33 and 34 are set at step a of block W, the AND logic of step 1 of block Step forward to
Three blocks proceed in parallel. When internal flag No. 33 is reset by the "SET" command at step c of block Similarly, when internal flag No. 34 is reset by the "SET" command at step d of block Y, it is reset at step e of block W.
The AND logic is established and the program of block Y is integrated into W.

In the lock mode, the contents of the steps for each block to be executed next from the user program area are transferred to the working area and stored. When a start input is received, the program is started, the instructions transferred to the working area are decoded, and operations are executed for each block according to the step condition. The calculation for each block is performed repeatedly in the order of block W → block X → block Y → block W by incrementing the block counter 227 built in the CPU. The program contents of the block are replaced with those of the next step, and the process counter related to the block is incremented by +1. However, in the case of non-sequential steps such as "JMP", "RET", and "RPT", the contents of the process counter are replaced with the next step number specified by the command, and the process jumps to that step.

Figure 9 shows the "BLC-INC" key 11A among the contents of the system program in lock mode.
The relevant part is shown in a flowchart, and the first
FIG. 0 shows a display example of a block display 3, a step display 4, an operation display 5, and three numeric displays 7, 8, and 9 of the display device.

The program shown in FIG. 9 is started when the mode selector switch 32 is switched to the lock mode. In the initial state 91, the display device displays the state of the step number of the block W currently being executed. In this state, for example, the state shown in Figure 10
As shown in 1W, the lamp W of the block display 3 lights up, the step display 4 displays the step number being executed, for example (05), and the data (01,
20,00) are displayed on the numerical displays 7, 8, and 9. In this state, if the "BLC-INC" key 11A is pressed, the state changes to state 93. This status indicates the status related to the step number of block X currently being executed. That is, for example, as shown in state 1X in FIG. 10, the lamp X of the block display 3 lights up,
The step display 4 displays the step number being executed, for example (25), and displays data (25, 10,
00) is displayed on the numerical displays 7, 8, and 9. When the "BLC-INC" key 11A is pressed in this state, the state changes to state 95, and each display device displays the contents of the step currently being executed in block Y. This content is illustrated in state 1Y in FIG.
When the "BLC-INC" key 11A is pressed in this state, the state shifts to state 97, which is completely different from the state in which the contents of each block were displayed one after another. In this state, as illustrated in state 2 in FIG. 10, the displays on the block display 3, step display 4, and operation display 5 are erased, and the execution step of block W is displayed on the numeric display 7. 8 shows the execution step of block X, and the number display 9 shows the execution step of block Y, for example (05,
25, 63) are displayed all at once. When the "BLC-INC" key 11A is pressed in this state, the process returns to the above-mentioned state 91, and the same order switching is repeated every time the "BLC-INC" key is pressed thereafter. In addition, the operation indicator lamp "RUN" on the lamp indicator 10 indicates the status.
In states 91, 93, and 95, the light will turn on if the selected block is in operation, and in state 97,
Lights up if any one block is in operation. In the present invention, the first state is the state in which the numerical displays 7, 8, and 9 display data related to the operation of the step being executed, and the second state is the state in which the numerical displays 7, 8, and 9 display the step number for each block.

According to the present invention, a single sequence controller can control a plurality of control objects in relation to each other, while utilizing a conventionally provided data display to display the operating status of each block and The simultaneous display of W, can be displayed.

[Brief explanation of the drawing]

1 to 8 are drawings related to an embodiment of the present invention, and FIG. 1 is an external front view thereof, and FIG.
3 is a block diagram of the electric circuit, FIG. 3 is a diagram showing the configuration of program command words stored in the user program area 30, FIG. 4 is a diagram showing the step configuration of the user program area 30, and FIG.
21, FIG. 6 is a diagram showing an example of the contents of the instruction words shown in FIG. Figure 8 is the 7th
FIG. 9 is a flowchart showing the essential parts of the system program, and FIG. 10 is an explanatory diagram of the operation of the display device shown in FIG. 1. 1...Input display, 2...Output display, 3...
Block indicator, 4... Step indicator, 5...
Operation display, 7, 8, 9...Numeric display, 11...Keyboard, 11A..."BLC-
INC” key, 21…CPU, 29…System program area.

Claims (1)

[Claims] 1. A plurality of input signal terminals, a plurality of output signal terminals, a program memory that stores data specifying the type of operation, step conditions, and output command data for each process step, and a program memory that stores the operation information in the program memory. A sequence controller that is equipped with a keyboard for writing types of data, data values, etc., and a central processing unit, and in which the program advances to the next step when a step condition is met, has a plurality of controllers that count process steps for each of multiple blocks. a user program memory area in which the program contents are written for each process step of the plurality of blocks;
A block display that displays the type of block, a numeric display that displays multiple types of data, a process step display that displays the number of process steps of the block displayed on the block display, and the numeric display is data (SET-A, SET-B,
SET-C), a second state in which the numeric display displays the step number for each block, and a key (block increment key) for switching between the above states. Each time the key is pressed, the blocks in the first state are switched according to a predetermined order, and the blocks are switched from the last block in the predetermined order to the second state, and from the second state to the first state. A step-by-step sequence controller configured to switch to the first block in the predetermined order in the state of.