JPS6237403Y2

JPS6237403Y2 -

Info

Publication number: JPS6237403Y2
Application number: JP1982070476U
Authority: JP
Priority date: 1982-05-13
Filing date: 1982-05-13
Publication date: 1987-09-24
Also published as: JPS58172340U

Description

【考案の詳細な説明】本考案は複数の操作部を同一ケーシング内に持
つスイツチに於いて各操作部状態をアナログ変換
し、これを単一出力線にて送信し受信部にてデジ
タル変換して操作部に対応させた出力とすること
を特徴とするスイツチである。[Detailed description of the invention] This invention converts the state of each operation part into analog in a switch that has multiple operation parts in the same casing, transmits this through a single output line, and converts it into digital at the receiving part. This switch is characterized in that the output corresponds to the operating section.

従来、例えば自動二輪車においては、ホーンス
イツチ、ターンスイツチ、デイマースイツチ……
等のスイツチ類は、ハンドル廻りに取り付けた一
つあるいは二つ以上のスイツチケーシング内に
各々の電気接続部が内蔵され、ここから各動作部
まで個々に配線するいわゆる直接接続方式を採つ
ていた。 Conventionally, for example, in motorcycles, horn switches, turn switches, daymer switches...
Switches such as these used the so-called direct connection method, in which each electrical connection was built into one or more switch casings attached to the handle, and each operating part was individually wired from there. .

しかし従来の形態のものは配線に比較的大きな
容積を必要とするほか、配線のハンダ付などによ
る接続個所も多く、それだけ製作工数や故障など
も多くなる欠点があつた。 However, the conventional type requires a relatively large volume for wiring, and has many connection points such as soldering of the wiring, which has the drawback of increasing manufacturing man-hours and failures.

本考案は上記欠点を解決したもので、図面に示
すように、複数の操作部を有するスイツチを２群
備え、夫々のスイツチの各操作部SW₀，SW₁……
にＲ_i＝２ⁱ×R₀となる特定の値をもつ抵抗R₀，R₁
……を並列に接続すると共にこれらを複数個直列
に接続し、このスイツチの各操作部の状態をアナ
ログ変換し、これを単一出力線にて抵抗−電圧
（Ｒ／Ｖ）変換部３，４にて変換し、この信号を
入力選択部５、アナログ−デジタル（Ａ／Ｄ）変
換部６、出力選択部７および、スイツチに対応す
る信号経路を同期させ高速にて交互に切り替える
制御部８を介して送信し、受信部にてデジタル変
換して前記スイツチの操作部に対応させた出力と
することを特徴とするものである。 The present invention solves the above-mentioned drawbacks. As shown in the drawing, the present invention includes two groups of switches each having a plurality of operating sections, each operating section SW ₀ , SW ₁ . . .
resistors R ₀ and R ₁ with specific values such that R _i =2 ⁱ ×R ₀
... are connected in parallel, and a plurality of these are connected in series, and the state of each operation part of this switch is converted into analog, and this is connected to the resistance-voltage (R/V) converter 3, with a single output line. 4, and converts this signal into an input selection section 5, an analog-to-digital (A/D) conversion section 6, an output selection section 7, and a control section 8 which synchronizes the signal paths corresponding to the switches and alternately switches them at high speed. It is characterized in that the signal is transmitted via the switch, is digitally converted in the receiving section, and is outputted in a way that corresponds to the operation section of the switch.

本考案によるスイツチにおいては、操作部総数
をｎとすると、任意の操作部SW_iに特定の値を持
つ抵抗Ｒ_iを並列に接続したものをｎ個直列に接
続しその両端を出力端子としたものである。 In the switch according to the present invention, when the total number of operating parts is n, resistors R _i having a specific value are connected in parallel to any operating part SW _i , and n pieces are connected in series, and both ends thereof are used as output terminals. It is something.

（ｉは０からｎ−１までの数値をとる）操作部SW_iに対する抵抗Ｒ_iの関係はＲ_i＝２ⁱ×
Ｒとなる。従つてSW₀に対するR₀を基準とする
時SW₁に接続される抵抗R₁はR₁＝2R₀となりSW₂
に接続される抵抗R₂はR₂＝4R₀の値となる。ここ
で第１図において例としてSW₀とSW₂がONにな
つている時出力端から見た合成抵抗RxはＲ_x＝R₁＋R₃＋R₄＝2R₀＋8R₀＋16R₀＝26R₀ となりＲ_xをR₀を単位とする２進数で表わすとＲ_x
＝（11010）₂・R₀となる。この時の各ビツトの状態
が各操作部状態に対応しこの例の場合０ビツトと
２ビツトすなわちSW₀とSW₂がONになつている
ことを示す。上記の様に合成抵抗値Ｒ_xは操作部
状態と個々に対応し合成抵抗Ｒ_xはＲ_x＝R₀・（SW₁＝OFF）＋R₀・2¹・（SW₂＝OFF）＋R₀・2²・（SW₃＝OFF）＋……＋R⁰・２^n-2・（SW_o-1＝OFF）で表わされる。（上式で括弧内の値は括孤内の論
理が真の時１，偽の時０をとる）本考案はこの合成抵抗を第２図に示すように単
一出力線１０，１１にてそれぞれ抵抗−電圧
（Ｒ／Ｖ）変換部以降に送信され、最終的にスイ
ツチの操作部と対応する信号として出力されるよ
うにしたものである。 (i takes a value from 0 to n-1) The relationship between the resistance R _i and the operating unit SW _i is R _i =2 ⁱ ×
It becomes R. Therefore, when R ₀ for SW ₀ is used as a reference, the resistance R ₁ connected to SW ₁ becomes R ₁ = 2R ₀ , and SW ₂
The resistance R ₂ connected to has a value of R ₂ =4R ₀ . Here, as an example in Figure 1, when SW ₀ and SW ₂ are ON, the combined resistance Rx seen from the output terminal is R _x = R ₁ + R ₃ + R ₄ = 2R ₀ + 8R ₀ + 16R ₀ = 26R ₀ , and R If _x is expressed as a binary number with R ₀ as the unit, then R _x
= (11010) ₂・R ₀ . The state of each bit at this time corresponds to the state of each operating section, and in this example, 0 bit and 2 bits, that is, SW ₀ and SW _2, are turned on. As mentioned above, the combined resistance value R _x corresponds to the operating unit status individually, and the combined resistance R _x is R _x = R ₀・(SW ₁ = OFF) + R ₀・2 ¹・(SW ₂ = OFF) + R ₀・It is expressed as 2 ²・(SW ₃ = OFF) +……+R ⁰・2 ^n-2・(SW _o-1 = OFF). (In the above equation, the value in parentheses takes 1 when the logic in parentheses is true, and 0 when it is false.) In the present invention, this combined resistance is connected to single output lines 10 and 11 as shown in Figure 2. Each signal is transmitted after the resistance-voltage (R/V) conversion section, and is finally output as a signal corresponding to the operation section of the switch.

以下本考案の一実施例について図面に基き説明
する。本考案は第２図のブロツク図に示す通り、
前述の複数の操作部をSW₀，SW₁，……SW_oを有
する２種のスイツチＡ１，スイツチＢ２が、それ
ぞれ単一出力線１０，１１により各々の抵抗−電
圧（Ｒ／Ｖ）変換部３，４を介して入力選択部５
に接続され、入力選択部５の出力はアナログ−デ
ナタル（Ａ／Ｄ）変換部６に接続され、更にＡ／
Ｄ変換部６の出力は出力選択部７に接続されてい
る。 An embodiment of the present invention will be described below with reference to the drawings. As shown in the block diagram of Figure 2, the present invention is as follows:
Two types of switches A1 and switch B2 having the plurality of operating units SW ₀ , SW ₁ _, . Input selection unit 5 via 3 and 4
The output of the input selection unit 5 is connected to an analog-to-digital (A/D) converter 6, and the output of the input selection unit 5 is connected to
The output of the D converter 6 is connected to an output selector 7.

そして、制御部８が入力選択部５、Ａ／Ｄ変換
部６、出力選択部７と接続されこの制御部８に
て、スイツチＡ１、スイツチＢ２に対応する入力
選択と出力選択の信号経路を同期させ高速にて交
互に切り替えるようになつている。 The control section 8 is connected to the input selection section 5, the A/D conversion section 6, and the output selection section 7, and the control section 8 synchronizes the input selection and output selection signal paths corresponding to the switch A1 and switch B2. It is designed to alternately switch at high speed.

なお、出力選択部７はスイツチＡ１に対応した
出力OA及びスイツチＢ２に対応した出力OBを持
ち、これが実際の回路の接続を行うリレー等の動
作部（図示しない）の入力となるものである。 The output selection section 7 has an output OA corresponding to the switch A1 and an output OB corresponding to the switch B2, which serve as inputs to an operating section (not shown) such as a relay that connects the actual circuit.

従つて本考案においては、スイツチＡ１の操作
状態によつて合成され合成抵抗値は、Ｒ／Ｖ変換
３を介することにより電圧に変換され入力選択部
５に入り更にＡ／Ｄ変換部６に送られる。この
Ａ／Ｄ変換部６の出力は出力選択部７を介して出
力OAに出力される。スイツチＢ２も同様にして
スイツチＢ２→Ｒ／Ｖ・変換部４→入力選択部５
→Ａ／Ｄ変換部６→出力選択部７の経路をとり出
力OBに出力される。 Therefore, in the present invention, the combined resistance value synthesized according to the operating state of the switch A1 is converted into a voltage via the R/V converter 3, enters the input selector 5, and is further sent to the A/D converter 6. It will be done. The output of the A/D converter 6 is outputted to the output OA via the output selector 7. Similarly, for switch B2, switch B2 → R/V converter 4 → input selector 5.
→ A/D converter 6 → output selector 7 route is taken and output to output OB.

本考案に於いてはスイツチ数に応じたＡ／Ｄ変
換部を設ければ所期の目的は達せられるものであ
るが、入力選択部５、出力選択部７及び制御部８
を設けることにより、入力選択と出力選択を制御
部８にて同期させ高速で交互に切り替えることに
よりＡ／Ｄ変換部が１個のみで同等の機能を果た
す様にしたものである。 In the present invention, the intended purpose can be achieved by providing A/D conversion sections corresponding to the number of switches, but the input selection section 5, output selection section 7, and control section 8 are
By providing this, input selection and output selection are synchronized by the control section 8 and switched alternately at high speed, so that the same function can be achieved with only one A/D conversion section.

上記実施例は、複数の操作部を有するスイツチ
Ａ，B2個を備えたものであるが、このスイツチ
は１つでも３つ以上でもよいことは言うまでもな
い。 Although the above embodiment includes two switches A and B each having a plurality of operating sections, it goes without saying that the number of switches may be one or three or more.

上記の如く本考案によればスイツチには操作部
と同数の抵抗が配線されるのみで、スイツチ出力
としては単一信号線でよいため、最も小型、軽量
を要求される操作部及び操作部への配線部を小型
軽量化することが可能となる。従つて自動二輪車
のスイツチに使用した場合、ハンドルに取り付け
るスイツチを、操作性を重視しなおかつコンパク
トにすることが可能となり、又スイツチへの配線
に必要な空間が極めて小さくなるため、非常に外
観的にも作業的にもすつきりしたものとなる。 As described above, according to the present invention, the switch only needs to be wired with the same number of resistors as the operating section, and a single signal line is sufficient for the switch output. It becomes possible to reduce the size and weight of the wiring section. Therefore, when used as a switch for a motorcycle, the switch attached to the handlebar can be made compact while emphasizing operability, and the space required for wiring to the switch is extremely small, making it extremely aesthetically pleasing. It also makes it easier to work with.

尚本考案は自動二輪車に限らず同種の機能を持
つ各種のスイツチに適用することが出来ることは
言うまでもない。 It goes without saying that the present invention can be applied not only to motorcycles but also to various types of switches having similar functions.

[Brief explanation of the drawing]

第１図は本考案によるスイツチの一実施例の回
路図、第２図は本考案の一実施例の構成を示すブ
ロツク図、第３図は本考案の一実施例を更に具体
化して示した回路図。１……スイツチＡ、２……スイツチＢ、３……
抵抗−電圧変換部Ａ、４……抵抗−電圧変換部
Ｂ、５……入力選択部、６……アナログデジタル
変換部、７……出力選択部、８……制御部、９…
…電源部、１０，１１……単一出力線、SW₀，
SW₁，SW₂……操作部、R₀，R₁，R₂……抵抗。 Fig. 1 is a circuit diagram of an embodiment of a switch according to the invention, Fig. 2 is a block diagram showing the configuration of an embodiment of the invention, and Fig. 3 is a more specific embodiment of an embodiment of the invention. circuit diagram. 1...Switch A, 2...Switch B, 3...
Resistance-voltage conversion section A, 4... Resistance-voltage conversion section B, 5... Input selection section, 6... Analog-to-digital conversion section, 7... Output selection section, 8... Control section, 9...
...Power supply section, 10, 11...Single output line, SW ₀ ,
SW ₁ , SW ₂ ... operation unit, R ₀ , R ₁ , R ₂ ... resistance.

Claims

[Scope of utility model registration request]

Each operation part of a switch with multiple operation parts
A resistor with a specific value of R _i = 2 ⁱ × R ₀ (i takes the number of operating parts n-1 from o) in SW ₀ , SW ₁ ...
R ₀ , R ₁ ... are connected in parallel, and a plurality of them are connected in series, and the state of each operation part of this switch is converted into analog, and this is converted into resistance-voltage (R/V) through a single output line. ) is converted by the converters 3 and 4, and this signal is converted by the input selector 5, analog-digital (A/
D) The signal is transmitted via the converter 6, the output selector 7, and the controller 8 which synchronizes the signal paths corresponding to the switches and alternately switches them at high speed, and the receiver converts the signal into digital data and sends it to the operating section of the switch. A switch having multiple operation parts for a vehicle, characterized in that outputs are made to correspond to each other.