JPS6237844B2 - - Google Patents

Info

Publication number
JPS6237844B2
JPS6237844B2 JP56080877A JP8087781A JPS6237844B2 JP S6237844 B2 JPS6237844 B2 JP S6237844B2 JP 56080877 A JP56080877 A JP 56080877A JP 8087781 A JP8087781 A JP 8087781A JP S6237844 B2 JPS6237844 B2 JP S6237844B2
Authority
JP
Japan
Prior art keywords
amplifier
input
fet
terminal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56080877A
Other languages
Japanese (ja)
Other versions
JPS57206106A (en
Inventor
Akira Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HITACHI ELECTRONICS
Original Assignee
HITACHI ELECTRONICS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HITACHI ELECTRONICS filed Critical HITACHI ELECTRONICS
Priority to JP56080877A priority Critical patent/JPS57206106A/en
Publication of JPS57206106A publication Critical patent/JPS57206106A/en
Publication of JPS6237844B2 publication Critical patent/JPS6237844B2/ja
Granted legal-status Critical Current

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  • Amplifiers (AREA)

Description

【発明の詳細な説明】 本発明はオシロスコープ等に使用される直流増
幅器の改良に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in DC amplifiers used in oscilloscopes and the like.

第1図は従来例を示す直流増幅器で、オシロス
コープの垂直軸増幅器に要求される高入力インピ
ーダンス、低ドリフト、広帯域の特性を実現する
ために、特性のそろつたTWIN FET2を広帯域
直流増幅回路3の入力バツフアに使用した例であ
る。この回路のTWINFET2は低ドリフト、かつ
広帯域(高Gmと等価である)を要求されるので
価格的に非常に高価である。第2図は第1図の欠
点を解消するため考案された回路で、高周波信号
増幅と直流から低周波信号増幅とをそれぞれ別々
の増幅器で行い加算するものである。入力端子1
からの一方の信号はコンデンサ5により直流分が
阻止され、交流分がFET6により増幅され、広
帯域差動増幅器7を経て出力端子4に出力され
る。また入力端子1からの他方の信号はFET入
力差動増幅器8で増幅された後、FET6の出力
信号と加算増幅されて出力端子4に出力される。
なお広帯域差動増幅器7の出力から抵抗9,1
1,12及び可変抵抗10で構成する回路により
帰還をかけて所定の増幅度を得ている。ここで入
力端子1から出力端子4までの増幅度について
は、FET6を経由する信号の増幅度と、FET入
力差動増幅器8を経由する信号の増幅度を等しく
することが要求される。しかしながら帰還抵抗等
の偏差があるため、可変抵抗10を調節して両者
の増幅度を等しくしている。この回路ではFET
は安価になるが調整箇所を生ずる欠点がある。
Figure 1 shows a conventional DC amplifier. In order to achieve the high input impedance, low drift, and broadband characteristics required for the vertical axis amplifier of an oscilloscope, TWIN FET 2 with uniform characteristics is used in the broadband DC amplifier circuit 3. This is an example used for input buffer. TWINFET2 in this circuit is required to have low drift and wide band (equivalent to high Gm), so it is very expensive. FIG. 2 shows a circuit devised to eliminate the drawbacks of FIG. 1, in which high-frequency signal amplification and direct current to low-frequency signal amplification are performed using separate amplifiers and summed. Input terminal 1
The DC component of one signal is blocked by the capacitor 5, the AC component is amplified by the FET 6, and is output to the output terminal 4 via the broadband differential amplifier 7. Further, the other signal from the input terminal 1 is amplified by the FET input differential amplifier 8, and then summated and amplified with the output signal of the FET 6 and output to the output terminal 4.
Note that resistors 9 and 1 are connected to the output of the broadband differential amplifier 7.
1 and 12 and a variable resistor 10, feedback is applied to obtain a predetermined amplification degree. Regarding the amplification degree from the input terminal 1 to the output terminal 4, it is required that the amplification degree of the signal passing through the FET 6 and the amplification degree of the signal passing through the FET input differential amplifier 8 be equal. However, since there is a deviation in the feedback resistance, etc., the variable resistor 10 is adjusted to equalize the amplification degree of both. In this circuit, FET
Although it is cheaper, it has the disadvantage of requiring adjustment points.

本発明の目的は上記欠点を除去し、安価で無調
整な直流増幅器を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned drawbacks and to provide an inexpensive and non-adjustable DC amplifier.

第3図は本発明の実施例を示す直流増幅器であ
る。入力端子1からの入力信号の一方はFET入
力差動増幅器8で増幅された後差動形広帯域増幅
器7に印加される。また入力信号の他方はコンデ
ンサ5で直流分を除いた交流成分がFET13,
14で構成する差動増幅器で増幅された後、差動
形広帯域増幅器7に印加されFET入力差動増幅
器8の出力と加算増幅される。また差動形広帯域
増幅器7の出力から抵抗11,12によりFET
入力差動増幅器8の負極性入力端子とFET14
のゲート端子に帰還をかけ、入力端子1と出力端
子4の間に所定の増幅度を持たせている。以上の
回路接続により直流域の特性はFET入力差動増
幅器8の特性で、交流域はFET13,14の増
幅特性と差動形広帯域増幅器7の特性により直流
増幅器を実現できる。FET入力差動増幅器8と
して直流特性の優れたものを安価に入手すること
は容易であり、FET差動増幅器及び差動形広帯
域増幅器7は直流特性を何ら要求されず、従つて
広帯域特性を容易に実現することは周知の技術で
よく、また帰還回路は固定抵抗11,12の1ル
ープのみであるため調整を必要としない。
FIG. 3 shows a DC amplifier showing an embodiment of the present invention. One of the input signals from input terminal 1 is amplified by FET input differential amplifier 8 and then applied to differential wideband amplifier 7 . The other side of the input signal is the capacitor 5, and the AC component excluding the DC component is sent to the FET 13,
After being amplified by a differential amplifier composed of 14, the signal is applied to a differential broadband amplifier 7, where it is summed and amplified with the output of the FET input differential amplifier 8. Also, from the output of the differential wideband amplifier 7, the FET is
Negative polarity input terminal of input differential amplifier 8 and FET 14
Feedback is applied to the gate terminal of , and a predetermined degree of amplification is provided between input terminal 1 and output terminal 4. With the above circuit connection, the characteristics in the DC region are the characteristics of the FET input differential amplifier 8, and the characteristics in the AC region are the amplification characteristics of the FETs 13 and 14 and the characteristics of the differential broadband amplifier 7 to realize a DC amplifier. It is easy to obtain a FET input differential amplifier 8 with excellent DC characteristics at a low cost, and the FET differential amplifier and the differential wideband amplifier 7 are not required to have any DC characteristics, so it is easy to obtain wideband characteristics. This can be realized using well-known techniques, and since the feedback circuit is only one loop of fixed resistors 11 and 12, no adjustment is required.

以上説明したごとく、本発明によれば、安価な
部品を組合せるのみで、また何らの調整を要せず
にドリフトが小さく、かつ利得が直流から高周波
まで一定の直流増幅器を容易に実現しうる。
As explained above, according to the present invention, it is possible to easily realize a DC amplifier with small drift and constant gain from DC to high frequencies simply by combining inexpensive parts and without requiring any adjustment. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第2図は、従来例を示す直流増幅器の
回路図、第3図は本発明の一実施例を示す直流増
幅器の回路図である。 1:入力端子、2:TWIN FET、3:広帯域
直流増幅回路、4:出力端子、5:コンデンサ、
6,13,14:FET、7:差動形広帯域増幅
器、8:FET入力差動増幅器、9,11,1
2:抵抗、10:可変抵抗。
1 and 2 are circuit diagrams of a conventional DC amplifier, and FIG. 3 is a circuit diagram of a DC amplifier according to an embodiment of the present invention. 1: Input terminal, 2: TWIN FET, 3: Wideband DC amplifier circuit, 4: Output terminal, 5: Capacitor,
6, 13, 14: FET, 7: Differential wideband amplifier, 8: FET input differential amplifier, 9, 11, 1
2: resistance, 10: variable resistance.

Claims (1)

【特許請求の範囲】[Claims] 1 直流から高周波までの成分を含む入力信号を
増幅する直流増幅器において、前記入力信号を2
分して一方をコンデンサに通して交流成分とし、
この交流成分を第1、第2のFETで構成する差
動増幅器の前記第1のFETのゲート端子に印加
し、前記差動増幅器の二つの出力の何れか又は双
方を差動形広帯域増幅器の入力端子に接続し、か
つ前記直流増幅器の入出力が同極性になるように
形成し、前記入力信号を2分した他方をFET入
力差動増幅器の正極性入力端子に印加し、この
FET入力差動増幅器の負極性入力端子を前記第
2のFETのゲート端子に接続し、前記FET入力
差動増幅器の出力端子を前記差動形広帯域増幅器
の入力端子に、前記直流増幅器の入出力が同極性
になるように接続し、前記差動増幅器の出力と前
記FET入力差動増幅器の出力とを加算して前記
直流増幅器の出力信号とすると共に、この出力信
号端子と前記第2のFETのゲート端子との間に
帰還回路を接続したことを特徴とする直流増幅回
路。
1 In a DC amplifier that amplifies an input signal containing components from DC to high frequency, the input signal is
and pass one through a capacitor to make it an alternating current component.
This alternating current component is applied to the gate terminal of the first FET of a differential amplifier composed of first and second FETs, and either or both of the two outputs of the differential amplifier are connected to the differential broadband amplifier. The DC amplifier is connected to the input terminal, and the input and output of the DC amplifier are formed to have the same polarity, and the other half of the input signal is applied to the positive input terminal of the FET input differential amplifier.
The negative polarity input terminal of the FET input differential amplifier is connected to the gate terminal of the second FET, the output terminal of the FET input differential amplifier is connected to the input terminal of the differential wideband amplifier, and the input/output terminal of the DC amplifier is connected to the input terminal of the FET input differential amplifier. are connected so that they have the same polarity, and the output of the differential amplifier and the output of the FET input differential amplifier are added to form the output signal of the DC amplifier, and this output signal terminal and the output of the second FET A DC amplifier circuit characterized in that a feedback circuit is connected between the gate terminal of the DC amplifier and the gate terminal of the DC amplifier.
JP56080877A 1981-05-29 1981-05-29 Dc amplifier Granted JPS57206106A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56080877A JPS57206106A (en) 1981-05-29 1981-05-29 Dc amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56080877A JPS57206106A (en) 1981-05-29 1981-05-29 Dc amplifier

Publications (2)

Publication Number Publication Date
JPS57206106A JPS57206106A (en) 1982-12-17
JPS6237844B2 true JPS6237844B2 (en) 1987-08-14

Family

ID=13730571

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56080877A Granted JPS57206106A (en) 1981-05-29 1981-05-29 Dc amplifier

Country Status (1)

Country Link
JP (1) JPS57206106A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2771314B2 (en) * 1990-07-11 1998-07-02 株式会社日立製作所 Broadband amplifier

Also Published As

Publication number Publication date
JPS57206106A (en) 1982-12-17

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