JPS6239910B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a sound generation circuit for a watch, and more particularly to a sound generation circuit for a watch that can generate onomatopoeic sounds such as birds or insects.

Clocks with a sounding mechanism are well known, and are particularly used as alarm clocks or time-signal clocks. In these conventional devices, the alarm sound or time-signal sound is usually produced by hitting a buzzer or a bell with a hammer. It was done with sound. In recent electronic watches, electronic circuits have also been used for such sound-producing mechanisms, and alarm sounds or time-signal sounds have been generated by chimes and the like.

However, these conventional devices have a problem in that they do not necessarily provide a sounding effect that gives a pleasant feeling to the user.

An object of the present invention is to provide a sound generation circuit for a watch that can produce onomatopoeic sounds of birds or insects with a simple configuration, paying attention to the fact that the voices of birds or the cries of insects are extremely pleasant sounds for humans. It is in.

In order to achieve the above object, the present invention includes: a sounding cycle reference signal generator that outputs a sounding cycle reference signal; and a sounding cycle reference signal generator that is connected to the sounding cycle reference signal generator, counts the sounding cycle reference signal, and calculates the sounding cycle in accordance with the sounding cycle. a frequency division ratio selection counter that outputs a count output that performs repeated counting as a frequency division ratio selection signal from a plurality of output terminals; a sound generation reference signal generator that outputs a sound generation reference signal of a constant frequency; An output terminal is connected to a clock input terminal, and a plurality of output terminals of the frequency division ratio selection counter are connected to frequency division ratio setting terminals corresponding to each stage, and the sound generation reference signal from the sound generation reference signal generator is connected to the frequency division ratio selection counter. A program frequency divider that divides the frequency according to the frequency division ratio selection signal from the ratio selection counter and outputs the frequency division signal; and a program frequency divider that is connected to the output terminal of the program frequency divider and generates sound according to the frequency division signal. It has a sound generator for driving an element, and is characterized in that it produces sound at a frequency that repeatedly changes in the sound generation cycle.

The present invention will be explained below based on the drawings.

FIG. 1 shows the model characteristics of a bird's chirping sound, with the sound frequency plotted on the vertical axis versus time on the horizontal axis. As is clear from Figure 1, the onomatopoeic sound of a bird's song exhibits a periodic waveform that repeats at a nearly constant pronunciation period T _a , and has a changing characteristic in which the frequency continuously decreases within each pronunciation period T _a . show.

Of course, the characteristic diagram in Figure 1 shows an extremely basic model, and actual bird chirps or insect calls are much more complex, and the pronunciation period itself changes.
Furthermore, it is clear that the change characteristics within the sound generation period T _a are also complex characteristics.

In any case, from the above results, the sound generation period T
If you perform a sounding function with a frequency that changes repeatedly with _a , you can obtain the onomatopoeic sound of a bird or insect, and if you use this as a clock alarm sound, time signal sound, or background sound during a time signal function, it will be extremely user-friendly. You can get a pronunciation clock that gives you a pleasant feeling.

The present invention provides a clock sounding circuit based on the basic principle described above, and a first embodiment thereof is shown in FIG.

In FIG. 2, the pronunciation reference signal generator 10 outputs a pronunciation reference signal of a constant frequency, and in order to obtain the model pronunciation characteristics as shown in FIG. It is necessary to form it from an oscillator that outputs a sound reference signal having the following characteristics.

The output of the sound generation reference signal generator 10 is supplied to a program frequency divider 12, which divides the frequency of the sound generation reference signal according to a predetermined program, and outputs the result from the program frequency divider 12 as a sound generation signal whose frequency changes.
In the embodiment, the program frequency divider 12 is formed of a programmable frequency divider whose frequency division ratio can be arbitrarily set in advance, and a plurality of different frequency division ratios are sequentially selected according to a predetermined program. The tone generation reference signal supplied to the clock input can be frequency-divided and output.

In order to sequentially select the programmed division ratios of the programmed frequency divider 12, each D of the frequency divider 12 is selected.
The Q output of the frequency division ratio selection counter 14 is supplied to each input, and the frequency division ratio corresponding to the frequency changing within the sound generation period T _a shown in FIG. 1 is determined by the Q output, that is, the frequency division ratio selection signal. is selectively read out from the program frequency divider 12. The frequency division ratio selection counter 14 sequentially counts the sound generation cycle reference signal supplied to the clock input, and at this time supplies the Q output, that is, the count output, to the program frequency divider 12 as a frequency division ratio selection signal, and uses this count output as a frequency division ratio selection signal. Therefore, the frequency division ratios of the program frequency divider 12 are sequentially selected. The frequency division ratio selection counter 14 in the embodiment is composed of a ring counter, and performs a repetitive counting operation by counting a predetermined number of clock inputs.

A tone generation period reference signal generator 16 is provided to supply a tone generation period reference signal to the clock input of the frequency division ratio selection counter 14, and the tone generation period T _a is determined by the tone generation period reference signal.

The frequency divided output of the program frequency divider 12 mentioned above is
The signal is supplied to the sound generator 18, and the sound generating elements of the sound generator 18 are driven in accordance with the frequency-divided output. The sound generator 18 in the embodiment includes an amplifier 20 and a speaker 22 forming a sound generation element, and after the frequency-divided output of the program frequency divider 12 is amplified by the amplifier 20, the speaker 22 is driven, and changes repeatedly with a sound generation period T _a . It is possible to perform a sound effect at a certain frequency.

The illustrated first embodiment is incorporated into an alarm clock, in which an alarm signal is detected from a reference contact 26 of a clock mechanism section 24, a control circuit 28 is operated in response to the alarm signal, and the respective circuits are controlled. It can be done. That is, the control circuit 28 normally outputs the program frequency divider 12 and the frequency division ratio selection counter 1.
4 is supplied with a reset signal, and both reference signal generators 10 and 16 are supplied with an oscillation stop signal. And the reference contact 26 of the clock mechanism section 24
When turned on, the control circuit 28 can cancel the reset signal and the oscillation stop signal and start the circuit operation.

The first embodiment of the present invention has the above configuration, and its operation will be explained below.

When the time indicated on the watch reaches the estimated time,
The reference contact 26 is turned on, and the control circuit 28 puts each circuit into operation. As a result, the sound reference signal generator 10 outputs a sound reference signal of a constant frequency, in this embodiment, a reference signal of 1 MHz, to the programmed frequency divider. Output to 12. At the same time, the sound generation period reference signal generator 16 outputs a low frequency signal, 380 Hz in this embodiment.
The sound generation period reference signal is supplied to the frequency division ratio selection counter 14, and the frequency division ratio selection counter 14 starts counting the sound generation period reference signal. counter 14
consists of a 7-bit ring counter, and in its initial state, each Q output is "0000000", and at this time the program frequency divider 12 outputs an 8KHz sound signal to the sound generator 18. Then, each time the frequency division ratio selection counter 14 counts the sound generation period reference signal, its Q output is set to "0000001", "0000010", etc.
..., and the program frequency divider 12 selects a preprogrammed frequency division ratio according to this frequency division ratio selection signal, and divides and outputs the sound generation reference signal based on this frequency division ratio. In the embodiment, the program frequency divider 12 sequentially performs a selection operation to increase its frequency division ratio according to a predetermined program, and as a result, a frequency conversion operation corresponding to the mode characteristic shown in FIG. 1 is performed within the sound generation period T _a . can be done.

When the frequency division ratio selection counter 14 counts 27 sound generation period reference signals, its count output, that is, the frequency division ratio selection signal, becomes "1111111", and at this time, the program frequency divider 12 determines that the frequency division ratio corresponds to the sound generation reference signal. A frequency division ratio that divides the frequency to approximately 4KHz will be selected. Then, the frequency division ratio selection counter 14 counts up upon input of the next sound generation cycle reference signal, returns to the initial state, and continues counting the number of repetitions again.

As described above, according to the first embodiment, approximately
Repeatedly changing the frequency corresponding to the characteristics shown in Fig. 1 with a sound generation period T _a of about 300 milliseconds
performs a sound effect in response to this sound signal whose frequency continuously changes, allowing the user to receive an alarm notification as an onomatopoeic sound of a bird's song or an insect's voice, allowing the user to hear an extremely pleasant alarm sound. .

Although the present embodiment is incorporated into an alarm clock and a reference signal is supplied to the control circuit 28, it is also possible to incorporate the present invention into a time signal, and a desired time signal is supplied at each hour on the hour. It is also preferable to use the onomatopoeic sound as the background sound for the time signal function or the time signal function. In addition, in the embodiment, the clock mechanism section 2
Although 4 is shown as an analog clock, it is of course possible to use a digital clock or the like.

A second embodiment of the present invention is shown in FIG.
Components that are the same as those in the drawings are given the same reference numerals and their explanations will be omitted.

A characteristic feature of the second embodiment is that the sound generation period reference signal generator is formed of a frequency divider 30 that divides the frequency of the sound generation reference signal and outputs the sound generation period reference signal. It consists of a multistage frequency divider to which the sound reference signal of the
It has the advantage of not requiring an independent oscillator as in the embodiment.

Further, FIG. 4 shows a third embodiment of the present invention, in which the same members as those in the first embodiment are designated by the same reference numerals and their explanations will be omitted.

The characteristic feature of the third embodiment is that the sound generation cycle reference signal generator 16 is formed of a sound generation cycle program frequency divider 32 that variably controls the cycle of the sound generation cycle reference signal according to a predetermined program. be. The program frequency divider 32 in the embodiment includes a programmable frequency divider 34 that divides the output of the sound generation reference signal generator 10 by a predetermined programmed frequency division ratio, and a frequency division ratio setting of the programmable frequency divider 34. It includes a ROM 36 and an address counter 38 for addressing the ROM 36. The clock input of the address counter 38 is supplied with a predetermined frequency-divided low frequency clock signal from the previous stage of the programmable frequency divider 34, and the address of the ROM 36 is specified by the address counter 38.
Furthermore, the frequency division ratio of the programmable frequency divider 34 is selectively controlled by the output of the ROM 36. The frequency-divided output of the programmable frequency divider 34 is then supplied to the aforementioned frequency division ratio selection counter 14 as a sound generation cycle reference signal.

Therefore, since the period of the counting clock signal of the frequency division ratio selection counter 14 changes, the repetition period, that is, the sounding period T _a changes, and the sounding period T _a is changed by a predetermined program in accordance with the count-up period of the address counter 38 . An example of this is shown in Fig. 5, and the repetition period T
It is understood that the sound generation periods T _a1 and T _a2 change within _b (the count-up period of the address counter 38).

Therefore, according to the third embodiment, it is possible to obtain a complex onomatopoeic sound in which the sound of birds chirping or the like changes within the repetition period T _b and is close to the actual chirping sound.

As explained above, according to the present invention, the output terminal of the frequency division ratio selection counter is connected to the frequency division ratio setting terminal of the program frequency divider, and the frequency division signal from the program frequency divider is supplied to the sound generator. Therefore, even with such a simple configuration, it is possible to obtain a sounding effect in which the sounding frequency changes repeatedly at a substantially constant sounding cycle, that is, an onomatopoeic sound of a bird, and it is possible to provide a pleasant alarm notification. Furthermore, since the present invention has a configuration using a counter, it is possible to omit a ROM for storing frequency division ratio data during integration, so the chip area equivalent to this ROM and the current consumed by the ROM can be saved. can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a model characteristic diagram of an onomatopoeic sound obtained by the present invention, FIG. 2 is a block circuit diagram showing a first preferred embodiment of a clock sound generation circuit according to the present invention, and FIG. Block circuit diagram showing an embodiment, No. 4
The figure is a block circuit diagram showing a third embodiment of the present invention.
FIG. 5 is a waveform diagram showing the sound generation characteristics in FIG. 4. T _a ... Sound generation period, 10 ... Sound generation reference signal generator, 12 ... Program frequency divider, 14 ... Frequency division ratio selection counter, 16 ... Sound generation period reference signal generator, 18 ... Sound generator, 30 ...Frequency divider, 32...
Program frequency divider for sound generation period.

Claims (1)

[Scope of Claims] 1. A sounding cycle reference signal generator that outputs a sounding cycle reference signal; and a counter connected to the sounding cycle reference signal generator, counting the sounding cycle reference signal and repeatedly counting in the sounding cycle. A frequency division ratio selection counter that outputs its output as a frequency division ratio selection signal from a plurality of output terminals, a sound generation reference signal generator that outputs a sound generation reference signal of a constant frequency, and an output terminal of the sound generation reference signal generator that receives a clock input. A plurality of output terminals of the frequency division ratio selection counter are respectively connected to a frequency division ratio setting terminal corresponding to each stage, and the sound generation reference signal from the sound generation reference signal generator is connected to the frequency division ratio selection counter. A program frequency divider that divides the frequency according to the frequency division ratio selection signal and outputs the frequency division signal; and a sound generator that is connected to the output terminal of the program frequency divider and drives the sound generation element according to the frequency division signal. What is claimed is: 1. A sound generating circuit for a watch, comprising: a sound generating circuit for a watch, characterized in that the sound generating circuit has a sound generating circuit having a frequency that changes repeatedly in a sound generating cycle. 2. In the sound generation circuit for a watch according to claim 1, the sound generation period reference signal generator is connected to the sound generation reference signal generator, and is a frequency divider that divides the frequency of the sound generation reference signal and outputs the sound generation period reference signal. A clock sounding circuit characterized by consisting of a device. 3. The sound generation circuit for a watch according to claim 2, wherein the frequency divider is a sound generation cycle program frequency divider that variably controls the period of the sound generation cycle reference signal according to a predetermined program. Sound generation circuit for clocks.