JPS6244424B2 - - Google Patents
Info
- Publication number
- JPS6244424B2 JPS6244424B2 JP57123882A JP12388282A JPS6244424B2 JP S6244424 B2 JPS6244424 B2 JP S6244424B2 JP 57123882 A JP57123882 A JP 57123882A JP 12388282 A JP12388282 A JP 12388282A JP S6244424 B2 JPS6244424 B2 JP S6244424B2
- Authority
- JP
- Japan
- Prior art keywords
- skewer
- plating
- sealing
- sealing jig
- jig
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/30—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations
- H10P72/34—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading
- H10P72/3411—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for conveying, e.g. between different workstations the wafers being stored in a carrier, involving loading and unloading involving loading and unloading of wafers
- H10P72/3412—Batch transfer of wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/50—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for positioning, orientation or alignment
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57123882A JPS5914656A (ja) | 1982-07-16 | 1982-07-16 | メツキ串插入装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57123882A JPS5914656A (ja) | 1982-07-16 | 1982-07-16 | メツキ串插入装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5914656A JPS5914656A (ja) | 1984-01-25 |
| JPS6244424B2 true JPS6244424B2 (fr) | 1987-09-21 |
Family
ID=14871696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57123882A Granted JPS5914656A (ja) | 1982-07-16 | 1982-07-16 | メツキ串插入装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5914656A (fr) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6422043U (fr) * | 1987-07-30 | 1989-02-03 |
-
1982
- 1982-07-16 JP JP57123882A patent/JPS5914656A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5914656A (ja) | 1984-01-25 |
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