JPS6247363B2 - - Google Patents
Info
- Publication number
- JPS6247363B2 JPS6247363B2 JP7018780A JP7018780A JPS6247363B2 JP S6247363 B2 JPS6247363 B2 JP S6247363B2 JP 7018780 A JP7018780 A JP 7018780A JP 7018780 A JP7018780 A JP 7018780A JP S6247363 B2 JPS6247363 B2 JP S6247363B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- frequency
- mixer
- input
- difference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B21/00—Generation of oscillations by combining unmodulated signals of different frequencies
- H03B21/01—Generation of oscillations by combining unmodulated signals of different frequencies by beating unmodulated signals of different frequencies
- H03B21/02—Generation of oscillations by combining unmodulated signals of different frequencies by beating unmodulated signals of different frequencies by plural beating, i.e. for frequency synthesis ; Beating in combination with multiplication or division of frequency
Landscapes
- Stereo-Broadcasting Methods (AREA)
- Manipulation Of Pulses (AREA)
Description
【発明の詳細な説明】
本発明は入力信号の周波数を２てい倍する回路
に関するものである。従来は第１図、第２図に示
すように基本的には両波整流形が主である。いづ
れの場合も、平衡度が出力信号の質を直接左右す
るという欠点がある。さらに入力周波数にほぼ比
例して平衡度も悪化する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that doubles the frequency of an input signal. Conventionally, as shown in FIGS. 1 and 2, the two-wave rectification type is basically the main type. In either case, the disadvantage is that the degree of balance directly affects the quality of the output signal. Furthermore, the degree of balance also deteriorates approximately in proportion to the input frequency.
本発明はこのような欠点にかんがみ成されたも
ので、ひづみがきわめて優れた２てい倍出力を得
られる様にしたものである。 The present invention has been developed in view of these drawbacks, and is designed to provide twice the output with extremely superior distortion.
以下図面に従つて説明する。第３図の１は入
力、２，３，７はミキサ、４は発振器、５，６は
Ｂ・Ｐ・Ｆ・８はＬ・Ｐ・Ｆである。 This will be explained below with reference to the drawings. In FIG. 3, 1 is an input, 2, 3, and 7 are mixers, 4 is an oscillator, 5 and 6 are B, P, and F, and 8 is L, P, and F.
第３図において、５の出力（P）はiとL
の和であり、６の出力（n）はiとLの差で
ある。これらP，nは７及び８により差として
取り出される。すなわち出力（０）は、
０＝（L＋i）−（L−i）
＝２i
ただしi＜L
となる。ここでi＜LであるからLが変動し
てもミキサ７によりキヤンセルされるため出力は
直接Lのえいきようを受けない。さらに両ルー
トの群遅延時間に著しい差がない限り０はL
の雑音の影響も受けない。従つて出力（０）は
Lのえいきようをほとんど受けずしかも最終出
力がミキサのため（L−i）以上のスプリアス
を波するＬ・Ｐ・Ｆだけで広帯域のダブラを構
成できる。ここでPもしくはnのどちらをロー
カルして用いても差しつかえない。その場合ロー
カル側に増巾器等を挿入するのは当然であり、ま
た、入力i及び発振器Lの分枝も、パワーデバ
イダー等を用いた構成でもよい。第４図は第３図
において２及び３を１つのミキサで構成したもの
である。 In Figure 3, the output ( P ) of 5 is i and L
The output ( n ) of 6 is the difference between i and L. These P and n are taken out as a difference by 7 and 8. That is, the output ( 0 ) is 0 = ( L + i ) - ( L - i ) = 2 i where i < L. Here, since i < L , even if L changes, it is canceled by mixer 7, so the output is not directly influenced by L. Furthermore, unless there is a significant difference in the group delay times of both routes, 0 is L.
It is not affected by noise. Therefore, the output ( 0 ) is
A wideband doubler can be constructed using only the L , P, and F, which are hardly affected by the effects of the L and, since the final output is a mixer, generate spurious waves of ( L - i ) or more. It does not matter whether P or n is used locally here. In that case, it is natural to insert an amplifier or the like on the local side, and the branches of the input i and the oscillator L may also be configured using a power divider or the like. FIG. 4 shows a configuration in which 2 and 3 in FIG. 3 are constructed with one mixer.
このように本発明によれば、入力変化幅を２倍
以上とつても出力のフイルタ切換なしで可能であ
り、かつ、スプリアス発生のないダブラを提供す
ることにある。 According to the present invention, it is an object of the present invention to provide a doubler that can double or more the input change width without switching the output filter and does not generate spurious signals.
第１図、第２図は従来のダブラで、第１図はト
ランジスタ等による構成を示す図、第２図はダイ
オードを用いた例で、第３図、第４図は本発明に
よる構成を示す図である。
１は入力端子、２，３，７はミキサ回路、５，
６はＢ・Ｐ・Ｆ、８はＬ・Ｐ・Ｆを示す、iは
入力信号を示す。
Figures 1 and 2 show conventional doublers, Figure 1 shows a structure using transistors, etc., Figure 2 shows an example using diodes, and Figures 3 and 4 show a structure according to the present invention. It is a diagram. 1 is an input terminal, 2, 3, and 7 are mixer circuits, 5,
6 indicates B/P/F, 8 indicates L/P/F, and i indicates an input signal.
Claims (1)
周波数と該信号発生器の周波数との和を得るため
の第１のミキサおよび波器と；前記入力周波数
と前記信号発生器の周波数の差を得るための第２
のミキサおよび波器と；前記和の周波数と前記
差の周波数との差を信号として得るための第３の
ミキサおよび波器とから成る周波数ダブラ。1 a signal generator that generates a desired frequency; a first mixer and a wave generator that obtains the sum of the input frequency and the frequency of the signal generator; 2nd to get
and a third mixer and waver for obtaining the difference between the sum frequency and the difference frequency as a signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7018780A JPS56166607A (en) | 1980-05-28 | 1980-05-28 | Frequency doubler |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7018780A JPS56166607A (en) | 1980-05-28 | 1980-05-28 | Frequency doubler |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS56166607A JPS56166607A (en) | 1981-12-21 |
| JPS6247363B2 true JPS6247363B2 (en) | 1987-10-07 |
Family
ID=13424268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7018780A Granted JPS56166607A (en) | 1980-05-28 | 1980-05-28 | Frequency doubler |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS56166607A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0349750U (en) * | 1989-09-22 | 1991-05-15 |
-
1980
- 1980-05-28 JP JP7018780A patent/JPS56166607A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0349750U (en) * | 1989-09-22 | 1991-05-15 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS56166607A (en) | 1981-12-21 |
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