JPS6248452B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ground fault phase determination method for determining a ground fault phase in the event of a one-line ground fault due to electric shock or other causes in an ungrounded three-phase circuit.

Known methods and devices for performing this type of discrimination are described, for example, in Japanese Patent Publication No. 18689/1982 or Japanese Patent Publication No. 11736/1982. All of these are intended to operate in response to normal system faults, and the former (a) uses a current detection method, so a capacitor must be installed in the system to supply ground fault current.

(b) Since it relies on detecting the absolute value of current, it is not possible to detect with high sensitivity due to the margin for fluctuations in system conditions (voltage to ground capacity, etc.).

(c) Due to the principle of detecting the absolute value of commercial frequency current, very high-speed operation cannot be expected.
(Originally, such high-speed operation was not required in response to system accidents.)

(a) It is intended for neutral point grounding systems, and is difficult to apply to ungrounded systems where the neutral point potential changes significantly.

(b) High-speed operation is essentially impossible because the operation depends on the average value of the half-wave rectified waveform by the thyristor.

There are drawbacks such as.

SUMMARY OF THE INVENTION An object of the present invention is to provide a non-grounded ground fault phase discrimination method that eliminates the above-mentioned drawbacks and can operate with higher sensitivity and higher speed.

FIG. 1 is a system diagram of an ungrounded three-phase circuit in which a device based on the ground fault phase discrimination method according to the present invention is installed, and this type of system generally connects a power transformer 1 to a bus 4 using a △-△ connection. , feeders 3a to 3n are connected via wire breakers 2a to 2n. 5 is a voltage transformer, and a ground fault phase determination device 6 is connected to the secondary side of this voltage transformer 5. Regardless of whether the feeder is aerial or cable-based,
Each phase has a capacitance Ca or Cn with respect to the ground, to a greater or lesser degree.

Now suppose that a one-wire ground fault occurs at the R phase P point of one feeder in such a system, and the fault point resistance at this time is
Rg, its zero-phase equivalent circuit is shown in FIG. In other words, the zero-sequence current that flows into the faulty feeder 3a from the bus side is the sum of the charge and current due to the ground capacitance Cb+...+Cn of other feeders, and the ground capacitance of the own feeder flows in the healthy feeders 3b to 3n. Only the charging current from Cb to Cn flows.

From this, the zero-sequence voltage V ₀ and fault point current Ig of the system are: V ₀ = E〓 _R −3I〓g・Rg ……(1) becomes. However, C is the total ground capacitance per unit of the entire system including the faulty feeder. (1) and (2)
From the formula, V〓 ₀ =E〓 _R 1/1+j3wCRg (3). From this, the vector diagram of the voltage of each phase is shown in Figure 3 (however, in this figure, the ground fault phase is the R phase), and the zero-sequence voltage is the ground fault point resistance Rg.
As it gets lower, it moves on the circle diagram, and Rg=0
It is maximum when .

Now, considering the ground voltage at the intermediate points r, s, and t of each line voltage, they are each expressed by the following equations. However, 0<n<1.

Divide both sides of the above equation by E = _R = E, standardize it, and then
By substituting equation (3), we get the following equation. However, E〓 _s
=a ² E, E〓 _T =aE, a=-1/2+j3/2.

If the absolute value of the above equation is set to n = 0.3, 0.5, and Rg is plotted from ∞ to 0, the result will be as shown in Figure 4 a and b. As is clear from this, when n = 0.3, excluding Rg = ∞, As shown in FIG. 4a, it can be seen that the R-phase ground fault time equation holds regardless of the value of Rg.

Also, when n=0.5, Rg=
Even if it is 0, |V〓r/E|=|V〓t/E|, but in other cases, equation (6) still holds true.

Therefore, by relatively comparing the magnitudes of |V〓r|, |V〓s|, and |V〓t|, and logically judging this result, it is possible to determine the ground fault phase. .

In practice, the closer the value of n is to 0.5, the more sensitive detection becomes possible, but since detection becomes difficult when Rg=0, it is necessary to select n depending on the purpose.

FIG. 5 shows an embodiment of a ground fault phase discriminating device that performs such an operation.
The secondary side of the voltage transformer 5 connected to each phase is connected to each phase and the neutral point. A reactor with a tap 11a, 11b, 11c is inserted between each phase input R, S, T, and an input transformer 1 is inserted between the tap and the neutral point N.
2a, 12b, and 12c are connected respectively. The reactor can be replaced with a resistor with a tap, but this will result in power loss. A negative polarity full-wave rectifier 13a, 13b, 13c and a positive polarity full-wave rectifier 13'a, 13'b, 13'c are connected to the secondary side of each input transformer, respectively.
One side of the outputs of the rectifiers are all connected to the reference potential 14. By changing the taps used, r, s, and t in FIG. 3 can be set to arbitrary positions.

The output of the full-wave rectifier 13a is input to one input of a known comparator 16a, 16'a for comparing instantaneous values.
Similarly, the full wave rectifier 13b is connected to the comparator 16b,
16'b, the full wave rectifier 13c is the comparator 16
It is connected to one input each of c and 16'c. On the other hand, the output of the full-wave rectifier 13a is connected to the comparator 16'b, 1
6'c and the output of the full-wave rectifier 13'b are connected to the other inputs of the comparators 16'c and 16'a.

It is assumed that each comparator generates a signal at its output when the positive polarity input is greater than the negative polarity input. The outputs of the comparators 16a, 16b, 16c and the comparators 16'a, 16'b, 16'c have time limit circuits 17a, 17b, 17c and 1
Connect 7'a, 17'b, and 17'c, respectively, and set the time period to 1/4 cycle of AC input (50Hz at 50Hz).
ms).

FIG. 6 is a diagram showing the relationship between the magnitude of the inputs A and B of the comparator and the output of the comparator in relation to the phase difference thereof. Figure 6 a is |A〓|<
If |B〓| and the phase difference is 0° or 180°, Figure 6b is |A〓|<|B〓| and if the phase difference is ±90°, Figure 6c is｜A〓｜＞｜B〓｜
and when the phase difference is 0° or 180°,
FIG. 6d shows the case where |A〓|>|B〓| and the phase difference is ±90°. In the figure, the broken line indicates the value obtained by subtracting the instantaneous value of the input B rectified waveform from the instantaneous value of the rectified waveform of input A, and since the comparator is configured to produce an output when input A is larger than input B, The comparator produces an output within the shaded range. As shown in Fig. 6b and |d|, if the relationship between input A and input B is |A〓|<|B〓|, the phase difference is ±90
Period t during which output is generated from the comparator at °
is maximum, and its value is less than 1/4 cycle of AC input, but the relationship between input A and input B is |A〓|
> |B〓|, the period t becomes minimum when the phase difference is ±90°, and its value is 1/ of the AC input.
4 cycles or more. Therefore, the time limit circuit 17
a, 17'a, 17b, 17'b, 17c, 17'
By setting the time period of c to correspond to 1/4 cycle of AC input, relative comparison of the absolute values of AC input can be performed.

The outputs of the time limit circuits 17a and 17'a are connected to the two inputs of the AND circuit 18a, and the outputs of the time limit circuits 17b and 17'b are connected to the two inputs of the AND circuit 18b.
Since the outputs of 7c and 17'c are added to the two inputs of the AND circuit 18c, if the condition of equation (6) is satisfied, a signal is generated at the output of the time limit circuits 17a and 17'a.
Since a signal is generated at the output F _R of the AND circuit 18a, the occurrence of an R-phase ground fault is detected. Note that the NOR circuits 19a, 19b, and 19c are interlock circuits that operate only when there is no signal at the output of other phases. For example, when it is determined that there is an R phase ground fault, the outputs of the other phases F _S , If there is no signal at F _T , a signal is generated at the output of the NOR circuit 19a, and the AND circuit 18a
operation. Further, if a signal is generated at the output F _R , the outputs of the NOR circuits 19b and 19c become non-signal states, so the operations of the AND circuits 18b and 18c are interlocked.

As described above, according to the present invention, since the voltage of the grid is used, it can be applied without any modification to the grid. In addition, the operating principle is based on a relative comparison of AC amounts, rather than a comparison of AC amounts with respect to a fixed set value, so it is less susceptible to disturbances such as grid voltage fluctuations, and therefore has high sensitivity. It is possible to detect

[Brief explanation of the drawing]

Figure 1 is a system diagram of an ungrounded three-phase circuit, Figure 2 is a micro equivalent circuit in the system shown in Figure 1 at the time of a one-wire ground fault, Figure 3 is a voltage vector diagram at the time of an R-phase ground fault, and Figure 4
The figure shows the relative change in the absolute value of the ground voltage corresponding to each phase when an R-phase ground fault occurs, Figure 5 is a block circuit diagram of the ground fault phase discrimination device, and Figure 6 explains the operation of the comparator. This is a diagram for 1...Power transformer, 2a or 2n...or disconnector, 3a or 3n...feeder, 4...bus bar,
5...Voltage transformer, 6...Ground fault phase determination device, 13
a to 13c...Negative polarity full wave rectifier, 13'a
to 13'c...Positive full-wave rectifier, 16a to 16c, 16'a to 16'c...Comparator, 17a to 17c, 17'a to 1
7'c...Time limit circuit.

Claims (1)

[Claims] 1. In an ungrounded three-phase circuit, detect the ground voltage at the midpoint of each line voltage, relatively compare the absolute values of each ground voltage, and determine the ground voltage corresponding to the own phase. A ground-fault phase determination method is characterized in that the phase is determined to be a ground-fault phase on the condition that each phase has a predetermined magnitude relationship with respect to the ground voltage corresponding to another phase. 2. In the ground fault phase discrimination method described in claim 1, the rectified instantaneous values of each ground voltage are directly compared, and the ground voltage corresponding to the own phase is compared with each ground voltage corresponding to the other phases. A ground fault phase determination method characterized in that a ground fault phase is determined on the condition that the value remains small continuously for a time period equivalent to 1/4 cycle of the system frequency.