JPS6249441A - Information processing system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] E-Industrial Application Field] The present invention relates to an information processing system, and particularly to an information processing system in which processing contents and processing flow can be easily specified (programmed).

[Summary of Disclosure] The M-book and the drawings specify the processing content and flow of processing in the form of constants, especially in an information processing system that allows the processing content and flow of processing to be easily defined (programmed). It is equipped with a processing table, a processing execution means for executing processing according to the processing contents, and a processing control means for causing the processing execution means to perform processing according to the processing flow, and can perform various processing simply by specifying the processing contents and the processing flow. The present invention discloses an information processing technique that enables control.

[Prior Art J] For software other than so-called interpreted software, it is necessary to follow the steps of creating a source program, compiling (assembling), linking, creating an executable module, and executing it. Therefore, for example, if a bug is found during debugging, the source program must be modified and the same procedure described above must be repeated from the beginning, or the modification (patch) must be made in machine language using a punch area, etc. It took a lot of time. Moreover, patching in machine language is good after the program is completed, but it can lead to errors during debugging and is quite time-consuming.

On the other hand, in conventional interpreter-type software, since the processing unit is small, the overhead occupies a large proportion of the entire processing, and it has the disadvantage that high-speed processing or high-speed control cannot be expected.

L Problems to be Solved by the Invention The present invention aims to provide an information processing system that allows easy program creation and modification, and that can realize high-speed processing or high-speed control.

Means for Solving Problem L] As a means for solving this problem, for example, the information processing apparatus of the embodiment shown in FIG. processing table 1, and sub-processes 1 to 1 in which processing is defined in the processing size specified in each instruction table and preferably at the machine language level.
The process execution means 2 includes a process execution means 2 for executing the process execution means 2, and a process control means 3 for causing the process execution means 2 to perform the process according to the process flow defined in the instruction table.

[Operation] In the configuration shown in FIG. 1, the processing control means 3 first fetches processing instructions from the instruction table 1. If the content is, for example, sub-processing number 2, line 100.10
2, the necessary processing parameters are given to the processing execution means 2, and the execution of the sub-processing 2 is started. Next, upon completion of execution of the sub-process 2, the processing execution means 2 sends status information regarding the sub-process via lines 103 and 101, if necessary, and returns control to the processing control means 3. Processing] The control means 3 determines the error etc. that occurred during the execution of the sub-processing 2 based on the status information, and after taking necessary measures, the control means 3 executes, for example, according to the processing flow specified in the instruction table 1. Fetch the processing instructions in instruction table 2.

[Embodiment J] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an information processing apparatus according to an embodiment of the present invention. In the figure, l is a processing table having a plurality of instruction tables 1 to m that define processing contents and processing flows in the form of constants, and 2 is a processing table that includes processing instructions (for example, numbers 1 to n) in instruction table i, for example. Process execution means 3 includes sub-processes 1 to n for executing predefined processes on the selected processing data according to the processing parameters in the instruction table i and, if necessary, specified by the processing parameters; A processing control means fetches the next instruction table k according to the information pointed to by the NEXT address pointer in the instruction table i and causes the processing execution means 2 to execute it; 4 is a predetermined error control means when an error that hinders the progress of the processing occurs; The error processing means 5 that executes the process is, for example, a data input/output device that is controlled by the apparatus of this embodiment.

Here, the number m of instruction tables 1 to m is subprocess 1
There are cases where the relationship between ~n and the number n is man or m < n. That is, in the case of man, multiple instruction tables perform the same sub-processing with different parameters.

When m<n, there is a sub-process that is not used.

FIG. 2 is a diagram showing the structure of the instruction table.

In the figure, numeral 21 is a NEXT table address pointer that points to the address of the next instruction table to be executed after the execution of the relevant instruction table, and when the content is 0, it means the end of processing. 22 is a processing command, which is conveniently represented by numbers 1 to n in accordance with the sub-processing numbers 1 to n. This command corresponds to sub-processes 1 to n in the process execution means 2, but for example, the user can define a process number p and add that sub-process p to the process execution means 2. . 23 holds information regarding processing parameters;
For example, it holds device addresses and control specifications of peripheral devices to be controlled. Reference numeral 24 holds information regarding processing data, such as the start address of input data, data length, and storage address of output data. Reference numeral 25 denotes an area for holding an end status, which holds status information about the result of the process. 26 is an error processing address, which stores an error processing address for dealing with an error that makes it impossible to continue processing, for example. 27 is an area where other information is stored.

In FIG. 1, the operation of the processing control means 3 is started by being given the address q of the first instruction table. In step Sl, processing instruction i is fetched from instruction table q. In step S2, sub-processing i is executed to execute processing instruction i. In step S3, sub-process i
Determine whether there is an error in the execution result. If there is no error, a normal completion code is set in the completion status 25 of the instruction table in step S6. If an error occurs, the error processing address 26 of the instruction table is checked in step S4. If the error processing address is not O, it means that the error should be processed at that point. Since the process moves to the error processing means 4, it jumps to the error processing address in step S9. Furthermore, when the error processing address is O, it means that it is sufficient to simply record the error status code.

The flow advances to step S5, where the end status area 2
Set the error completion code to 5. In step S7, the contents of the NEXT table address pointer 21 are fetched from the instruction table. In step S8, it is determined whether the content is O or not.

When it is O, it indicates that there is no next instruction table, and the process ends. If it is not O, the process returns to step S1 and the processing instruction of the next instruction table is fetched.

FIG. 3 is an explanatory diagram showing the flow of print processing and control in the embodiment. In the figure, in step 5100, processing instruction i
Execute. For example, it is a command to edit data into a print format and set it in a predetermined amount. The processing control means 3 calls sub-processing i of the processing execution means 2 for this processing. The processing execution means 3 executes data editing processing according to the processing parameters 23 and information 24 regarding processing data in the command table. When the processing is completed, the process returns from sub-processing i. The processing control means 33 processes the processing status in step 5101, and in step 5102
executes the next processing instruction j. For example, this is a process of outputting the editing results to a printer. The processing control means 3 performs sub-processing j
call.

The processing execution means 2 outputs the print completion data to the printer 6 via line 104 and receives the printer status via line 105. When printing is completed, sub-processing
The process returns from step 5103, and the process control means 2 writes the process status in step 5103. In step 5104, processing instruction k is executed. For example, this is a process of checking whether printing is normal or not. Generally, error handling for input/output devices is complicated, so an instruction table for this purpose is sometimes prepared. If the processing execution means 2 executes the sub-processing k and detects that there is an unrecoverable error in the print processing, after returning from the sub-processing k, control is given to the error processing means 4 in step 5106. This is a case where the contents of the error processing address 26 of the instruction table are not O. Also,
Step 5107 when the series of instruction tables is completed normally
The process moves to execution completion return, and the process returns to O8, for example.

EFFECTS OF THE INVENTION As described above, according to the present invention, the user can perform the desired task simply by creating a simple processing table, which saves time and effort. Furthermore, since the processing table has a simple structure, debugging can be facilitated and debugging time can be shortened. In addition, since the processing instruction unit is large, the overall processing head occupies a small proportion, and high-speed processing can be achieved.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of an information processing apparatus according to an embodiment of the present invention, FIG. 2 is a diagram showing the structure of an instruction table, and FIG. 3 is an explanatory diagram showing the print processing and control flow of the embodiment. . Here, l...processing table, 2...processing execution means, 3...processing control means, 4...error processing means, 5
...It is a data input/output device.

Claims (1)

[Claims] A processing table that defines processing content and processing flow in the form of constants, processing execution means for executing the processing of the processing content, and processing control means for causing the processing execution means to perform processing according to the processing flow. An information processing method characterized by comprising: