JPS625655U - - Google Patents

Info

Publication number
JPS625655U
JPS625655U JP9583085U JP9583085U JPS625655U JP S625655 U JPS625655 U JP S625655U JP 9583085 U JP9583085 U JP 9583085U JP 9583085 U JP9583085 U JP 9583085U JP S625655 U JPS625655 U JP S625655U
Authority
JP
Japan
Prior art keywords
breakdown voltage
semiconductor
semiconductor chip
planar shape
polygon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9583085U
Other languages
English (en)
Other versions
JPH0539636Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985095830U priority Critical patent/JPH0539636Y2/ja
Publication of JPS625655U publication Critical patent/JPS625655U/ja
Application granted granted Critical
Publication of JPH0539636Y2 publication Critical patent/JPH0539636Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)

Description

【図面の簡単な説明】
第１図は本考案の実施例に係わるセンタタツプ
型ダイオードを示す平面図、第２図及び第３図は
第１及び第２のダイオードチツプを示す斜視図、
第４図は第１図のダイオードを接続した回路を示
す回路図、第５図は第４図の回路中の状態を示す
波形図である。 １……放熱支持板、６……第１のダイオードチ
ツプ、７……第２のダイオードチツプ。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 同一種類に属するが、耐圧は異なつている
    複数の半導体チツプを共通の放熱支持板上に固着
    した構造の半導体装置において、 前記複数の半導体チツプの内で耐圧の低い方の
    半導体チツプの平面形状を多角形とし、耐圧の高
    い方の半導体チツプの平面形状を丸形または前記
    多角形よりも角数の多い多角形としたことを特徴
    とする半導体装置。 (2) 前記耐圧の低い方の半導体チツプの平面形
    状が略正六角形であり、前記耐圧の高い方の半導
    体チツプの平面形状が略真円である実用新案登録
    請求の範囲第１項記載の半導体装置。 (3) 前記耐圧の低い方の半導体チツプ及び前記
    耐圧の高い方の半導体チツプがいずれもダイオー
    ドチツプである実用新案登録請求の範囲第１項又
    は第２項記載の半導体装置。
JP1985095830U 1985-06-26 1985-06-26 Expired - Lifetime JPH0539636Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985095830U JPH0539636Y2 (ja) 1985-06-26 1985-06-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985095830U JPH0539636Y2 (ja) 1985-06-26 1985-06-26

Publications (2)

Publication Number Publication Date
JPS625655U true JPS625655U (ja) 1987-01-14
JPH0539636Y2 JPH0539636Y2 (ja) 1993-10-07

Family

ID=30960891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985095830U Expired - Lifetime JPH0539636Y2 (ja) 1985-06-26 1985-06-26

Country Status (1)

Country Link
JP (1) JPH0539636Y2 (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081663U (ja) * 1983-11-10 1985-06-06 富士電機株式会社 ツインタイプ半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6081663U (ja) * 1983-11-10 1985-06-06 富士電機株式会社 ツインタイプ半導体装置

Also Published As

Publication number Publication date
JPH0539636Y2 (ja) 1993-10-07

Similar Documents

Publication Publication Date Title
JPS625655U (ja)
JPS606252U (ja) 半導体装置
JPS62152474U (ja)
JPH0390956U (ja)
JPS6350140U (ja)
JPS614441U (ja) 高圧ダイオ−ドアレ−
JPS58195455U (ja) バイポ−ラｉｃ
JPS60125745U (ja) 半導体ユニツト
JPS62177038U (ja)
JPS62197851U (ja)
JPS61127666U (ja)
JPS6214935U (ja)
JPS60118256U (ja) 太陽電池パネル装置
JPS6220836U (ja)
JPS62134242U (ja)
JPS6157540U (ja)
JPH0273746U (ja)
JPH0159674U (ja)
JPS63851U (ja)
JPS60113642U (ja) 半導体装置
JPS6278763U (ja)
JPS59192853U (ja) 半導体素子
JPS5954952U (ja) 半導体装置
JPS61121731U (ja)
JPH01169037U (ja)