JPS6258647B2 - - Google Patents

Info

Publication number
JPS6258647B2
JPS6258647B2 JP57113497A JP11349782A JPS6258647B2 JP S6258647 B2 JPS6258647 B2 JP S6258647B2 JP 57113497 A JP57113497 A JP 57113497A JP 11349782 A JP11349782 A JP 11349782A JP S6258647 B2 JPS6258647 B2 JP S6258647B2
Authority
JP
Japan
Prior art keywords
double layer
electric double
layer capacitor
opening
insulating plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57113497A
Other languages
Japanese (ja)
Other versions
JPS593912A (en
Inventor
Takayoshi Muranaka
Hajime Mori
Makoto Fujiwara
Yoshihiro Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57113497A priority Critical patent/JPS593912A/en
Publication of JPS593912A publication Critical patent/JPS593912A/en
Publication of JPS6258647B2 publication Critical patent/JPS6258647B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/13Energy storage using capacitors

Landscapes

  • Electric Double-Layer Capacitors Or The Like (AREA)

Description

【発明の詳細な説明】 この発明は電気二重層キヤパシタに関するもの
である。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electric double layer capacitor.

電気二重層キヤパシタは分極性電極と電解質
(液)との界面に生ずる電気二重層を利用した大
静電容量キヤパシタである。その本体は第1図の
ように、活性炭を主とした分極性電極1をセパレ
ータ2(電解液3)を介して対向させ、集電板を
兼ねた金属ケース5,6と封口体4によつて密封
したコイン型またはボタン型構造をなしたもので
ある。
An electric double layer capacitor is a large capacitance capacitor that utilizes an electric double layer formed at the interface between a polarizable electrode and an electrolyte (liquid). As shown in Fig. 1, the main body consists of polarizable electrodes 1 mainly made of activated carbon facing each other with a separator 2 (electrolyte 3) in between, metal cases 5 and 6 that also serve as current collector plates, and a sealing body 4. It has a sealed coin- or button-shaped structure.

しかしながらこの本体7の耐電圧は水溶液電解
液で0.8V、無水の電解液で2V(信頼性を考慮し
た許容電圧)と低く、その最大の用途であるC−
MOS IC(相補型金属酸化膜半導体集積回路)の
RAM(ランダムアクセスメモリ)の停電バツク
アツプに使用するため、その一般的な駆動電圧
5Vに適合するように、3〜7個の電気二重層キ
ヤパシタ本体7を直列接続して対処している。と
ころで従来、この直列接続を実現する積層構造は
第2図のように、底の浅いシリンダ型の金属ケー
ス8に電気二重層キヤパシタ本体7を側面に絶縁
体12を配して数個積層し、さらに、1つの極の
外部端子を有する金属板10、絶縁板11、そし
てもう1つの極の外部端子を有する金属板9を順
に挿入し、最後に開口部を絞り加工を行なつてい
た。
However, the withstand voltage of this main body 7 is as low as 0.8V when using an aqueous electrolyte and 2V when using an anhydrous electrolyte (allowable voltage considering reliability).
MOS IC (complementary metal oxide semiconductor integrated circuit)
Typical driving voltage for RAM (Random Access Memory) used for power outage backup
In order to adapt to 5V, three to seven electric double layer capacitor bodies 7 are connected in series. Conventionally, the laminated structure for realizing this series connection is as shown in FIG. 2, in which several electric double layer capacitor bodies 7 are stacked on a shallow cylindrical metal case 8 with an insulator 12 on the side. Furthermore, a metal plate 10 having an external terminal of one pole, an insulating plate 11, and a metal plate 9 having an external terminal of the other pole are sequentially inserted, and finally the opening is drawn.

ところが、この電気二重層キヤパシタ13の積
層構造は、キヤパシタ本体と外部端子との間の接
触抵抗が大きく、また外部端子として丸型のもの
が使用できないという欠点があつた。
However, the laminated structure of the electric double layer capacitor 13 has disadvantages in that the contact resistance between the capacitor body and the external terminal is large, and round-shaped external terminals cannot be used.

したがつて、この発明の目的は、その接触抵抗
を低減でき、断面丸型端子の使用が可能であり、
しかも小形化を図ることができる電気二重層キヤ
パシタを提供することである。
Therefore, an object of the present invention is to reduce the contact resistance and enable the use of a terminal with a round cross section.
Moreover, it is an object of the present invention to provide an electric double layer capacitor that can be made smaller.

この発明の第1の実施例を第3図および第4図
に示す。すなわち、この電気二重層キヤパシタ
は、底の浅いシリンダ型の金属ケース16の底部
16aの中央に小径の底部開口16bを形成し、
底部16aの口縁の内側に外部端子14を溶接に
よつて取付け、その先端を開口16bより突出す
る。絶縁板17には丸型外部端子14を位置付け
る凹部17aおよび後に述べるもう1つの丸型外
部端子15が位置付けられる凹部17bと貫通孔
17cを有しており、ケース16の上端開口16
cより底部16aに挿入される。外部端子15は
予め最初に挿入される1個目の電気二重層キヤパ
シタ本体7の絶縁板17側の極板に溶接されてい
る。このキヤパシタ本体7を金属ケース16の上
端開口16cより挿入し、端子15を底部開口1
6bより突出するとともに、残りの電気二重層キ
ヤパシタ本体7をさらに挿入積層し、かつ内側面
に絶縁体12を配して後、開口16cを絞り加工
により外側の本体7に加圧ぎみにかしめられ一体
化される。
A first embodiment of the invention is shown in FIGS. 3 and 4. That is, this electric double layer capacitor has a small-diameter bottom opening 16b formed in the center of the bottom 16a of a shallow cylindrical metal case 16,
The external terminal 14 is attached to the inside of the mouth edge of the bottom portion 16a by welding, and its tip protrudes from the opening 16b. The insulating plate 17 has a recess 17a in which the round external terminal 14 is positioned, a recess 17b in which another round external terminal 15 described later is positioned, and a through hole 17c.
c is inserted into the bottom portion 16a. The external terminal 15 is welded in advance to the electrode plate on the insulating plate 17 side of the first electric double layer capacitor body 7 to be inserted first. This capacitor body 7 is inserted through the upper end opening 16c of the metal case 16, and the terminal 15 is inserted into the bottom opening 1
6b, the remaining electric double layer capacitor main body 7 is further inserted and laminated, and the insulator 12 is arranged on the inner surface, and then the opening 16c is drawn and swaged to the outer main body 7 so as to be pressurized. be integrated.

このように構成したため、従来例とは逆に外部
端子14,15の反対側に上端開口16cが位置
することとなる。また仮りに第1図のケース(極
板)5を、ケース(極板)6をとした場合、
プラス側である第3図(実施例)の外部端子15
はケース5と溶接であるのに対して、第2図(従
来)では金属板10とケース5は圧接である。ま
たマイナス側である外部端子14はケース16と
溶接、ケース16はケース6と圧接であるのに対
して、金属板9とケース8、ケース8とケース6
がいずれも圧接であるため、電気抵抗を少なくす
るという点でこの実施例は優位性を持つている。
また圧接部分もこの実施例では全て絞り部分の鋭
いエツジにて接触する構造のため、それ以外の圧
接部分を含む従来のものに比してその接触抵抗は
大きく低下している。さらに、外部端子14,1
5は溶接により、丸型以外の角型など任意の形や
材質の異なる金属または表面処理された金属が取
付けられる利点がある。しかも従来の金属板9,
10の積層がないため、小形になる。
With this configuration, the upper end opening 16c is located on the opposite side of the external terminals 14 and 15, contrary to the conventional example. Also, if the case (electrode plate) 5 in Fig. 1 is used as the case (electrode plate) 6,
External terminal 15 in FIG. 3 (example) on the positive side
The metal plate 10 and the case 5 are welded together in FIG. In addition, the external terminal 14 on the negative side is welded to the case 16, and the case 16 is pressure-welded to the case 6, whereas the metal plate 9 and the case 8, and the case 8 and the case 6
Since both are pressure-welded, this embodiment has the advantage of reducing electrical resistance.
Further, in this embodiment, all the press-contact parts are structured so that they come into contact with each other at the sharp edges of the constricted parts, so that the contact resistance is greatly reduced compared to the conventional type including other press-contact parts. Furthermore, external terminals 14,1
No. 5 has the advantage that any shape other than a round shape, such as a square shape, a metal of a different material, or a metal with a surface treatment can be attached by welding. Moreover, the conventional metal plate 9,
Since there is no stack of 10 layers, the size is small.

この発明の第2の実施例を第5図に示す。すな
わち、この電気二重層キヤパシタは、第1の実施
例において外部端子14′,15′をスナツプイン
形にくの字に折曲してプリント基板に差込むだけ
で仮固定できるようにしている。その他は第1の
実施例と同様である。
A second embodiment of the invention is shown in FIG. That is, in the first embodiment, this electric double layer capacitor can be temporarily fixed by simply bending the external terminals 14' and 15' into a dogleg shape and inserting them into a printed circuit board. The rest is the same as the first embodiment.

以上のように、この発明の電気二重層キヤパシ
タは、金属ケースの底部に小径の開口部を形成
し、その開口部縁に第1の外部端子を溶接すると
ともに、底部に支持された絶縁板を介してキヤパ
シタ本体に第2の外部端子を溶接するようにした
ため、従来よりも接触抵抗を低減でき、丸型端子
を使用でき、かつ小形化を図ることができるとい
う効果がある。
As described above, the electric double layer capacitor of the present invention has a small-diameter opening formed at the bottom of the metal case, a first external terminal welded to the edge of the opening, and an insulating plate supported at the bottom. Since the second external terminal is welded to the capacitor body through the capacitor body, the contact resistance can be reduced compared to the conventional case, a round terminal can be used, and the capacitor can be made smaller.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は電気二重層キヤパシタ本体の断面図、
第2図は従来例の断面図、第3図はこの発明の第
1の実施例の断面図、第4図はその底面図、第5
図は第2の実施例の断面図である。 7…電気二重層キヤパシタ本体、14,15…
外部端子、16…金属ケース、16a…底部、1
6b…底部開口、16c…上端開口、17…絶縁
板。
Figure 1 is a cross-sectional view of the electric double layer capacitor body.
FIG. 2 is a sectional view of the conventional example, FIG. 3 is a sectional view of the first embodiment of the present invention, FIG. 4 is a bottom view thereof, and FIG.
The figure is a sectional view of the second embodiment. 7... Electric double layer capacitor body, 14, 15...
External terminal, 16...Metal case, 16a...Bottom, 1
6b...Bottom opening, 16c...Top opening, 17...Insulating plate.

Claims (1)

【特許請求の範囲】 1 浅底で底部に小径の底部開口を有するシリン
ダ型金属ケースと、この金属ケースの前記底部の
内面に溶接されて前記底部開口より突出した第1
の外部端子と、前記金属ケースの上端開口に挿入
されて前記底部に載置した絶縁板と、前記金属ケ
ースの上端開口に挿入されて前記絶縁板上に積層
されるとともに前記上端開口の開口縁でかしめら
れた複数の電気二重層キヤパシタ本体と、この電
気二重層キヤパシタ本体のうちの前記絶縁板に接
触する極板に溶接されて前記絶縁板を貫通すると
ともに前記底部開口より突出した第2の外部端子
とを備えた電気二重層キヤパシタ。 2 前記第1および第2の外部端子は断面丸型ま
たは角型のはんだ付可能な金属または表面処理を
行つた金属である特許請求の範囲第1項記載の電
気二重層キヤパシタ。 3 前記第1および第2の外部端子はスナツプイ
ン型である特許請求の範囲第1項または第2項記
載の電気二重層キヤパシタ。
[Scope of Claims] 1. A cylindrical metal case with a shallow bottom and a small diameter bottom opening, and a first cylinder welded to the inner surface of the bottom of the metal case and protruding from the bottom opening.
an insulating plate inserted into the upper opening of the metal case and placed on the bottom; an opening edge of the upper opening that is inserted into the upper opening of the metal case and stacked on the insulating plate; a plurality of crimped electric double layer capacitor bodies; a second electrode which is welded to a pole plate in contact with the insulating plate of the electric double layer capacitor bodies, penetrates the insulating plate and protrudes from the bottom opening; Electric double layer capacitor with external terminal. 2. The electric double layer capacitor according to claim 1, wherein the first and second external terminals are made of a solderable metal having a round or square cross section or a surface-treated metal. 3. The electric double layer capacitor according to claim 1 or 2, wherein the first and second external terminals are snap-in type.
JP57113497A 1982-06-29 1982-06-29 electric double layer capacitor Granted JPS593912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57113497A JPS593912A (en) 1982-06-29 1982-06-29 electric double layer capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57113497A JPS593912A (en) 1982-06-29 1982-06-29 electric double layer capacitor

Publications (2)

Publication Number Publication Date
JPS593912A JPS593912A (en) 1984-01-10
JPS6258647B2 true JPS6258647B2 (en) 1987-12-07

Family

ID=14613807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57113497A Granted JPS593912A (en) 1982-06-29 1982-06-29 electric double layer capacitor

Country Status (1)

Country Link
JP (1) JPS593912A (en)

Also Published As

Publication number Publication date
JPS593912A (en) 1984-01-10

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