JPS6272109A - Manufacture of compound semiconductor device - Google Patents
Manufacture of compound semiconductor deviceInfo
- Publication number
- JPS6272109A JPS6272109A JP21181885A JP21181885A JPS6272109A JP S6272109 A JPS6272109 A JP S6272109A JP 21181885 A JP21181885 A JP 21181885A JP 21181885 A JP21181885 A JP 21181885A JP S6272109 A JPS6272109 A JP S6272109A
- Authority
- JP
- Japan
- Prior art keywords
- compound semiconductor
- single crystal
- layer
- semiconductor layer
- crystal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
(イ)産業上の利用分野
この発明は化合物半導体装置の製造方法に関する。さら
に詳しくはSi基板上に■−V族化族化合物半導体積層
させてなる化合物半導体装置の製造方法に関し、化合物
半導体デバイス作製の基幹技術として利用される。DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application This invention relates to a method for manufacturing a compound semiconductor device. More specifically, the present invention relates to a method of manufacturing a compound semiconductor device in which a -V group compound semiconductor is laminated on a Si substrate, and is utilized as a key technology for manufacturing a compound semiconductor device.
(ロ)従来の技術
QaΔS等の化合物半導体は、その擾れたRlfiを生
かして、光半導体デバイスおよび高速デバイスに利用さ
れている。たとえば、化合物半導体にP N )B合を
形成して、太陽電池を構成することにより優れた効率が
期待できるため、受光面側をGaA3層を用いて構成し
、このQa As Eを支持する基板として比較的軽い
81基板を用いたものが軽量化を要求される宇宙用太陽
電池として研究されている。また、価格面においても、
Ga As等の化合物半導体は、81基板に比べて不利
のために、Si基板上にGaASIHを形成した化合物
半導体デバイスが開発される傾向にある。従来、3i基
板上にGa AS層を形成覆る方法としては、次に述べ
る■■■の3通りの方法が用いられている。(b) Conventional technology Compound semiconductors such as QaΔS are utilized in optical semiconductor devices and high-speed devices by taking advantage of their distorted Rlfi. For example, excellent efficiency can be expected by forming a P N )B combination on a compound semiconductor to construct a solar cell, so the light-receiving surface side is constructed using three layers of GaA, and a substrate supporting this Qa As E is used. A solar cell using a relatively light 81 substrate is being researched as a space solar cell that requires a reduction in weight. Also, in terms of price,
Since compound semiconductors such as GaAs are disadvantageous compared to 81 substrates, there is a tendency to develop compound semiconductor devices in which GaASIH is formed on a Si substrate. Conventionally, the following three methods have been used to form and cover a Ga AS layer on a 3i substrate.
■ この方法は、$1とGa ASの中間の格子定数を
持つ1品系を利用するものであり、第3図に示すように
、81基板(1)と化合物半導体層(5)との間に格子
整合層(6)を形成している。この格子整合層(6)は
、例えばQe si 、Ga AS P等の温晶組成を
段階的に変化させた結晶層である。そして、この格子整
合1上にエピタキシャル成長によって旧聞化合物半導体
層(5)が形成されている。■ This method uses a one-piece system with a lattice constant between $1 and Ga AS, and as shown in Figure 3, there is a layer between the 81 substrate (1) and the compound semiconductor layer (5). A lattice matching layer (6) is formed. This lattice matching layer (6) is a crystal layer of, for example, Qe si , Ga ASP, etc. whose warm crystal composition is changed in stages. A conventional compound semiconductor layer (5) is formed on this lattice matching 1 by epitaxial growth.
■ この方法は、第4図に示すように、81基板(1)
と化合物半導体層(5)との間にGe単結晶層(2)を
形成する方法であり、このGei#結晶層(2)の形成
には、例えば電子ビーム蒸W (EB)法、イオンクラ
スタビーム蒸ff(ICB)法、分子線エピタキシー(
MBE)法、気相成ff<(CVD)法Wを用いて形成
され、化合物半導体層(5)は、分子線エピタキシー(
MBE)法または、有機金属気相成長(MOCVD)法
を用いて形成されている。■ This method uses 81 substrates (1) as shown in Figure 4.
This is a method of forming a Ge single crystal layer (2) between a compound semiconductor layer (5) and a compound semiconductor layer (5), and the formation of this Gei# crystal layer (2) can be performed using, for example, electron beam evaporation W (EB) method, ion cluster beam evaporation (ICB) method, molecular beam epitaxy (
The compound semiconductor layer (5) is formed using the molecular beam epitaxy (MBE) method and the vapor phase deposition ff<(CVD) method W.
It is formed using a metal organic chemical vapor deposition (MOCVD) method or a metal organic chemical vapor deposition (MOCVD) method.
■ この方法は、第5図で示すように、Si基板(1)
上に分子線エピタキシー(MBE)法または、有機金属
気相成長(MOCVD)法を用いて、例えばGa As
等の化合物半導体層(5)を直接形成する方法である。■ This method uses a Si substrate (1) as shown in Figure 5.
Using molecular beam epitaxy (MBE) or metal organic chemical vapor deposition (MOCVD), for example,
This is a method of directly forming a compound semiconductor layer (5) such as.
(ハ)発明が解決しようとする問題点
しかるに、上記■の方法では格子整合層(6)の格子定
数の変化率を、できるだけ小さくする必要があるため、
成長の制御が複雑になる。また、格子整合層(6)中の
内部応力による化合物半導体層(5)の結晶性に対する
影響を抑制するために、格子整合M(6)の厚みを大き
くとる必要がある。例えば3iとGaASの場合には、
この格子整合層(6)の厚みは数十虐程度必要とされる
ので、低価格化、軽団化の条件に適合しない。(C) Problems to be Solved by the Invention However, in the method (3) above, it is necessary to minimize the rate of change in the lattice constant of the lattice matching layer (6);
Growth control becomes complicated. Further, in order to suppress the influence of internal stress in the lattice matching layer (6) on the crystallinity of the compound semiconductor layer (5), it is necessary to increase the thickness of the lattice matching layer M(6). For example, in the case of 3i and GaAS,
The thickness of this lattice matching layer (6) is required to be on the order of several tens of thousands of tons, so it does not meet the requirements for lower costs and lighter weight.
上記■の方法では、基板の加熱により81基板と単結晶
Ge層とが共に高温(例えば600〜700℃程度)に
まで加熱されるのでSi基板(1)と化合物半導体層(
5)間の熱膨張係数の違いから、成長温度からの冷却過
程で大ぎな格子ひずみが生じ、この格子ひずみが化合物
半導体層(5)中に残留する。In method (2) above, both the 81 substrate and the single-crystal Ge layer are heated to a high temperature (for example, about 600 to 700°C) by heating the substrate, so the Si substrate (1) and the compound semiconductor layer (
Due to the difference in the coefficient of thermal expansion between the layers (5), a large lattice strain occurs during the cooling process from the growth temperature, and this lattice strain remains in the compound semiconductor layer (5).
特に、化合物半導体層(5)としてQa ASを3A以
上形成した場合には、この格子ひずみが原因でGaAS
@長層に割れが発生するという問題がある。In particular, when Qa AS is formed as the compound semiconductor layer (5) at 3A or more, this lattice strain causes GaAS
@There is a problem that cracks occur in the long layers.
上記■の方法では、前記■の方法と同様に熱膨張係数の
相違に基づく残留格子ひずみが原因となり、良質な化合
物半導体層(5)を得ることは困難である。In the above method (2), it is difficult to obtain a good quality compound semiconductor layer (5) due to residual lattice distortion due to the difference in thermal expansion coefficients, similar to the above method (2).
この発明は上記の問題点、特に上記■における問題点を
解消すべくなされたちのであり、81基板と化合物半導
体層との間に熱膨張係数の相違に基づく格子ひずみが発
生することを防止する製造方法を提供することを目的と
するものである。This invention has been made to solve the above-mentioned problems, especially the above-mentioned problem (2). The purpose is to provide a method.
(ニ)問題点を解決するための手段および作用かくして
この発明によれば、シリコン塁板上に、ゲルマニウム単
結晶層を形成した後、該ゲルマニウム単結晶層上にI[
I−VM化合物半導体層を形成するにあたり、前記■−
v族化合物半導体層には吸収されず、ゲルマニウム単結
晶に吸収されることによりゲルマニウム単結晶を加熱で
きる電磁波を上記ゲルマニウム単結晶層表面上に照射し
ながらm−v1tk化合物半導体層を形成することを特
徴とする化合物半導体装置の製造方法が提供される。(d) Means and operation for solving the problems Thus, according to the present invention, after forming a germanium single crystal layer on a silicon base plate, I[
In forming the I-VM compound semiconductor layer, the above-mentioned ■-
Forming an m-v1tk compound semiconductor layer while irradiating the surface of the germanium single crystal layer with electromagnetic waves that are not absorbed by the V group compound semiconductor layer but can heat the germanium single crystal by being absorbed by the germanium single crystal. A method for manufacturing a compound semiconductor device with features is provided.
この発明におけるGe単結晶層は通常用いられる方法、
例えば電子ビーム蒸着(EB)法、イオンクラスタビー
ム蒸着(ICB)法1分子線エピタキシー(MBE)法
、気相成長(CVD)法等を用いて所定の81基板上に
形成される。The Ge single crystal layer in this invention is formed by a commonly used method.
For example, it is formed on a predetermined 81 substrate using an electron beam evaporation (EB) method, an ion cluster beam evaporation (ICB) method, a single molecular beam epitaxy (MBE) method, a vapor phase epitaxy (CVD) method, or the like.
なお、3i基板に上記Ge単結晶層を形成する前に通常
用いられる方法、(?lえば1−IF9a理等の方法に
より基板表面を清浄化する操作を行なうことが好ましい
。Note that, before forming the Ge single crystal layer on the 3i substrate, it is preferable to perform an operation of cleaning the substrate surface by a commonly used method, such as a 1-IF9a process.
■−V族化合物半導体層には吸収されずGe1t1結晶
層に吸収される電磁波としては、近赤外線又は赤外線領
域の電磁波ごとにレーザを使用するのが好ましく、例え
ばYAGレーザ〈波長1.06廂)が好適に用いられる
。このレーザを用いてGe単結晶表面上を照射し、Ge
単結晶表面を■−v族化合物半導体層形成最適温度(例
えばGa Asを形成する際は約600〜700℃)に
設定しても、半導体層が形成されるのに必要な時間内に
は、Ge単結晶層と81基板との界面付近はGe単結晶
層表面設定温度にまでは上昇しない(例えばGe単結晶
層表面を600〜700℃に上昇させても成長中に50
0℃程度までしか上昇しない)。従って3i基板と■−
v族化合物半導体層との間に生じるひずみは従来の基板
加熱の方法と比較して署しく減少されることとなる。(2) As for the electromagnetic waves that are not absorbed by the V group compound semiconductor layer but are absorbed by the Ge1t1 crystal layer, it is preferable to use a laser for each electromagnetic wave in the near-infrared or infrared region, such as a YAG laser (wavelength: 1.06 cm). is preferably used. This laser is used to irradiate the surface of the Ge single crystal, and
Even if the single crystal surface is set at the optimal temperature for forming a ■-V group compound semiconductor layer (for example, approximately 600 to 700°C when forming GaAs), within the time required to form a semiconductor layer, The temperature near the interface between the Ge single crystal layer and the 81 substrate does not rise to the set surface temperature of the Ge single crystal layer (for example, even if the surface temperature of the Ge single crystal layer is raised to 600 to 700 °C, the temperature at 50 °C during growth
(The temperature rises only to around 0℃). Therefore, the 3i board and ■-
The strain generated between the V-group compound semiconductor layer and the V-group compound semiconductor layer is significantly reduced compared to conventional substrate heating methods.
■−v族化合物半導体層には例えばGa As 。(2) For example, GaAs is used for the -v group compound semiconductor layer.
GsAρAs 、Ga P、In P、Ga As P
。GsAρAs, GaP, InP, GaAsP
.
In Ga P、In Ga As P等からなる単結
晶層が挙げられ、通常用いられる方法、例えば分子線エ
ピタキシー(MBE)法、有機金属気相蒸着(MOCV
D)法等を用いて固有のil膜形成に最適な温度、例え
ばエピタキシ一温度下で形成することができる。従って
このような単結晶層の種類及び成長方法に応じてGe単
結晶層の表面温度がかかる最適温度に設定されるように
電磁波の照射条件を定めて照射を行なえばよい。Examples include single crystal layers made of InGaP, InGaAsP, etc., and can be formed using commonly used methods such as molecular beam epitaxy (MBE) and metal organic vapor deposition (MOCV).
D) The film can be formed at an optimal temperature for forming a specific IL film, for example, at a temperature equal to epitaxy, using a method such as method D). Therefore, the electromagnetic wave irradiation conditions may be determined and irradiated so that the surface temperature of the Ge single crystal layer is set to the optimum temperature according to the type and growth method of the single crystal layer.
(ホ)実施例
以下、この発明を実施例を用いで説明する。ただしこれ
により本発明は限定されるものではない。(e) Examples The present invention will be explained below using examples. However, the present invention is not limited thereby.
第1図および第2図はこの発明の化合物半導体装置の製
造り法を説明する構成説明図である。FIGS. 1 and 2 are structural explanatory diagrams illustrating a method for manufacturing a compound semiconductor device of the present invention.
まず3i基板(1)をHF!2!!即し酸化膜を除去し
た模、1xlO’pa以下の真空中下、電子ビーム蒸着
(EB)法を用いて基板温度450℃で1)jITのG
e単結晶層(2)を形成した。ついでGe単結晶層(2
)表面にNd :YAGレーザ(波長:1.06)a
)でレーザ光(4)を照射しGe単結晶層(2)表面が
600〜700°C程度になるようにレーザ光の照)1
強度を設定しながら個々のBNルツボからGaとASを
供給し分子線エピタキシー(MBE)法によってQa
As単結晶層(3)を第2図に示すように3虐エピタキ
シヤル成長させて化合物半導体装置を¥!J造した。First, convert the 3i board (1) to HF! 2! ! 1) G of jIT was removed using the electron beam evaporation (EB) method at a substrate temperature of 450°C in a vacuum of 1xlO'pa or less to remove the oxide film.
e A single crystal layer (2) was formed. Next, a Ge single crystal layer (2
)Nd:YAG laser (wavelength: 1.06)a on the surface
) to irradiate the surface of the Ge single crystal layer (2) with laser light (4) to a temperature of about 600 to 700°C.
Ga and AS are supplied from individual BN crucibles while setting the strength, and Qa is produced by molecular beam epitaxy (MBE) method.
As shown in Figure 2, the As single crystal layer (3) is grown epitaxially to form a compound semiconductor device. I built J.
上記のようにして製造したこの発明の化合物半導体装置
(以下試料Aという)の効果を検討するために比較の対
象として他の条件は同一ではあるがレーザ光照射による
方法ではなくて、従来法(基板加熱法)を用いてGe単
結晶層を加熱してGa As単結晶層を形成した試料(
以下試料Bという)を作成した。In order to examine the effects of the compound semiconductor device of the present invention (hereinafter referred to as sample A) manufactured as described above, other conditions were the same, but instead of the method using laser light irradiation, the conventional method ( A sample in which a Ga As single crystal layer was formed by heating a Ge single crystal layer using a substrate heating method (
A sample (hereinafter referred to as sample B) was prepared.
そして、それら試料A、Bの結晶性を比較するために、
X線2結晶法による回折ピークの半値幅を測定した結果
、試料Aの半値幅が試料Bの半値幅より小さく、試料A
の方が優れた結晶性を有することが確認された。従って
、本発明の製造方法によれば格子ひずみの発生が抑制さ
れていることが判明した。In order to compare the crystallinity of samples A and B,
As a result of measuring the half-width of the diffraction peak by the X-ray two-crystal method, the half-width of sample A was smaller than that of sample B.
It was confirmed that this had better crystallinity. Therefore, it was found that the production method of the present invention suppresses the occurrence of lattice distortion.
(へ)発明の効果
以上述べたように、本発明によれば、Ge単結晶層と8
1基板との界面付近の温度上昇をおさえ、化合物半導体
層との温度差を軽減することによって3i基板上に格子
ひずみの少ない化合物半導体層を形成することができる
ので、格子ひずみが原因である半導体層の割れや品質の
ばらつきを防ぐことができて高品質、低価格、かつ軽岱
な化合物半導体装置の製造が可能となる。よって、宇宙
用太陽電池等に有効に適用される製造方法である。(f) Effects of the Invention As described above, according to the present invention, the Ge single crystal layer and the
By suppressing the temperature rise near the interface with the 3i substrate and reducing the temperature difference with the compound semiconductor layer, it is possible to form a compound semiconductor layer with less lattice strain on the 3i substrate. Cracks in layers and variations in quality can be prevented, making it possible to manufacture high-quality, low-cost, and lightweight compound semiconductor devices. Therefore, this is a manufacturing method that can be effectively applied to space solar cells and the like.
第1図および第2図はこの発明の詳細な説明す(旧=−
3i基板、 (2)・・・・・・Ge単結晶層、(3
)・・・・・・GeAS単結晶層、 (4)・・・・・
・レー+f光、(5)・・・・・・化合物半導体層、
(6)・・・・・・格子整合層。
第1図
第2図
第3図
第4図
第5図Figures 1 and 2 provide a detailed explanation of the invention (old=-
3i substrate, (2)...Ge single crystal layer, (3
)...GeAS single crystal layer, (4)...
・Ray+f light, (5)...Compound semiconductor layer,
(6)... Lattice matching layer. Figure 1 Figure 2 Figure 3 Figure 4 Figure 5
Claims (1)
た後、該ゲルマニウム単結晶層上にIII−V族化合物半
導体層を形成するにあたり、 前記III−V族化合物半導体層には吸収されず、ゲルマ
ニウム単結晶に吸収されることによりゲルマニウム単結
晶を加熱できる電磁波を上記ゲルマニウム単結晶層表面
上に照射しながらIII−V族化合物半導体層を形成する
ことを特徴とする化合物半導体装置の製造方法。 2、電磁波がレーザである特許請求の範囲第1項記載の
製造方法。 3、III−V族化合物半導体層がGaAs、GaAlA
s、GaP、InP、GaAsP、InGaPまたはI
nGaAsPからなる単結晶層である特許請求の範囲第
1項記載の方法。[Claims] 1. After forming a germanium single crystal layer on a silicon substrate, in forming a III-V group compound semiconductor layer on the germanium single crystal layer, the III-V group compound semiconductor layer is A compound semiconductor characterized in that a III-V compound semiconductor layer is formed while irradiating the surface of the germanium single crystal layer with electromagnetic waves that can heat the germanium single crystal by being absorbed by the germanium single crystal without being absorbed by the germanium single crystal. Method of manufacturing the device. 2. The manufacturing method according to claim 1, wherein the electromagnetic wave is a laser. 3. III-V compound semiconductor layer is GaAs, GaAlA
s, GaP, InP, GaAsP, InGaP or I
2. The method according to claim 1, wherein the layer is a single crystal layer of nGaAsP.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21181885A JPS6272109A (en) | 1985-09-25 | 1985-09-25 | Manufacture of compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21181885A JPS6272109A (en) | 1985-09-25 | 1985-09-25 | Manufacture of compound semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6272109A true JPS6272109A (en) | 1987-04-02 |
Family
ID=16612102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21181885A Pending JPS6272109A (en) | 1985-09-25 | 1985-09-25 | Manufacture of compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6272109A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008306176A (en) * | 2007-05-08 | 2008-12-18 | Tokyo Electron Ltd | Method and apparatus for heat treatment of compound semiconductor |
-
1985
- 1985-09-25 JP JP21181885A patent/JPS6272109A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008306176A (en) * | 2007-05-08 | 2008-12-18 | Tokyo Electron Ltd | Method and apparatus for heat treatment of compound semiconductor |
| US20100055881A1 (en) * | 2007-05-08 | 2010-03-04 | Tokyo Electron Limited | Heat treatment method for compound semiconductor and apparatus therefor |
| JP2013251556A (en) * | 2007-05-08 | 2013-12-12 | Tokyo Electron Ltd | Heat treatment method for compound semiconductor, and apparatus of the same |
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