JPS6276536A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6276536A
JPS6276536A JP21545385A JP21545385A JPS6276536A JP S6276536 A JPS6276536 A JP S6276536A JP 21545385 A JP21545385 A JP 21545385A JP 21545385 A JP21545385 A JP 21545385A JP S6276536 A JPS6276536 A JP S6276536A
Authority
JP
Japan
Prior art keywords
aluminum
wiring
water
integrated circuit
circuit operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21545385A
Other languages
Japanese (ja)
Inventor
Norimasa Matsumoto
松本 憲昌
Koichiro Masuko
益子 耕一郎
Toshifumi Kobayashi
小林 稔史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP21545385A priority Critical patent/JPS6276536A/en
Publication of JPS6276536A publication Critical patent/JPS6276536A/en
Pending legal-status Critical Current

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To increase a moisture resistance by providing an aluminum wiring that is not used for a circuit operation in a region between an aluminum signal wiring and the dicing line of a semiconductor chip, in said region no PSG being present. CONSTITUTION:An aluminum wiring 30 having no direct relation with a circuit operation is provided in a region which is between a dicing line 6 and an aluminum signal wiring 4 and wherein a PSG 9 does not exist. Between the PSG 9 and an insulative film 2 below the aluminum signal wirings 4 and 5 through which signals used for the circuit operation pass, the other layer of a poly-silicon or the like may be present. Thus, the aluminum wiring 3 consumes water and a variety of ions contained in water and can prevent the invasion of the water and the various ions contained in the water as a structural barrier.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は樹脂封止型半導体集積回路装置に関するもの
である〇 〔従来の技術〕 従来の樹脂封止型半導体集積回路装置では、半導体チッ
プの最外周部分には配線を施すと断線の恐れがあるため
、配線が設けられていない余白の部分があり、最外周の
アルミニウム信号配線の外側には何の配線も設けられて
いない。
[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a resin-encapsulated semiconductor integrated circuit device. [Prior Art] In a conventional resin-encapsulated semiconductor integrated circuit device, the semiconductor chip is Since there is a risk of disconnection if wiring is provided at the outermost circumference, there is a blank area where no wiring is provided, and no wiring is provided outside the aluminum signal wiring at the outermost circumference.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このような従来の半導体集積回路装置では、半導体チッ
プ最外周のダイシングラインよシ水が浸入する可能性が
ある。一般に、アルミニクムに対して十分な水分子が存
在する条件下では、水酸化アルミニクム〔Al(OH)
s)  ができやすく、水酸化アルミニウムは酸にもア
ルカリにも溶ける性質がある。従って、アルミニウム信
号配線はアルカリ金属イオンや、ノ10ゲン・イオンな
どの不純物を含゛む水に侵されやすい。さらに、アルミ
ニウム配線の下にあるP s G (phospho 
−5ilicate Plass)が水と反応し、リン
酸が生成され、そのリン酸によレアルミニウム信号配線
が腐食されるという問題点がある。
In such a conventional semiconductor integrated circuit device, there is a possibility that water may enter the dicing line at the outermost periphery of the semiconductor chip. In general, under conditions where sufficient water molecules exist for aluminum, aluminum hydroxide [Al(OH)
s) is easily formed, and aluminum hydroxide has the property of being soluble in both acids and alkalis. Therefore, aluminum signal wiring is easily attacked by water containing impurities such as alkali metal ions and nitrogen ions. Furthermore, P s G (phospho
There is a problem in that the phosphoric acid (-5ilicate Plass) reacts with water to produce phosphoric acid, and the phosphoric acid corrodes the real aluminum signal wiring.

この発明は上記のような問題点全解消するたである。This invention solves all of the above problems.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る半導体集積回路装置は、回路動作に使用
されるアルミニウム信号配線をPEGを介して設けた半
導体集積回路装置に於て、半導体チップのダイシングラ
インと上記アルミニウム信号配線との間にPSGが存在
しない領域を設け、さらにその上に回路動作に使用され
ないアルミニウム配線を設けたものである。
A semiconductor integrated circuit device according to the present invention is a semiconductor integrated circuit device in which an aluminum signal wiring used for circuit operation is provided via a PEG, in which a PSG is provided between a dicing line of a semiconductor chip and the aluminum signal wiring. A non-existing area is provided, and aluminum wiring that is not used for circuit operation is further provided above the area.

〔作用〕[Effect]

この発明における半導体集積回路装置は、ダイシングラ
インより水が浸入した場合、浸入した水をチップ最外周
部のPSGが存在しない領域に設けた回路動作に使用さ
れないアルミニウム配線によって消費させ、内部のPE
Gが存在する領域まで水を浸入させないことによシリン
酸の生成を防ぎ、アルミニウム信号配線の腐食を防止す
る。
In the semiconductor integrated circuit device of the present invention, when water enters from the dicing line, the infiltrated water is consumed by the aluminum wiring that is not used for circuit operation and is provided in the area where PSG is not present at the outermost periphery of the chip.
By preventing water from penetrating into the region where G exists, the formation of silicic acid is prevented and corrosion of the aluminum signal wiring is prevented.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明を図に示す実施例VC基づいて説明する
。
Hereinafter, the present invention will be explained based on the embodiment VC shown in the drawings.

第1図はこの発明の一実施例による半導体集積回路装置
のチップを示す平面図で、第2図11第1図のU−n@
VCよる拡大断面図である。第1図及び第8図に放て、
(11は半導体集積回路の半導体基板、+21iこの半
導体基板の表面上に形成された絶縁膜、+31//i回
路動作に直接関係しないアルミニク配線で、この配線(
3)はダイシングライン(6)とアルミニウム信号配線
(4)の間でPSG(9)の存在しない領域に設けられ
ている。(41、(5)は回路動作に使用される信号の
通るアルミニウム信号配線であり、アルミニウム配線+
41、!5+の下にあるP S G +91と絶縁膜(
2)との間には図に示す例では何もないが、P S G
 +91と絶縁膜(2)との間にポリシリコン等の他の
層が介在することもある。(611−i半導体集積回路
チップをダイシングする際のダイシングラインである。
FIG. 1 is a plan view showing a chip of a semiconductor integrated circuit device according to an embodiment of the present invention.
It is an enlarged sectional view by VC. Released in Figures 1 and 8,
(11 is a semiconductor substrate of a semiconductor integrated circuit, +21i is an insulating film formed on the surface of this semiconductor substrate, +31//i is an aluminum wiring not directly related to circuit operation, and this wiring (
3) is provided in a region where no PSG (9) exists between the dicing line (6) and the aluminum signal wiring (4). (41, (5) is an aluminum signal wiring through which signals used for circuit operation pass, and aluminum wiring +
41,! P S G +91 under 5+ and the insulating film (
2) There is nothing in the example shown in the figure, but P S G
Another layer such as polysilicon may be interposed between +91 and the insulating film (2). (This is a dicing line used when dicing 611-i semiconductor integrated circuit chips.

tel V′i表面を保護するパシベーション膜、(8
)は浸入する水の径路である。
Passivation film that protects the tel V'i surface (8
) is the path of infiltrating water.

回路動作に使用されないアルミニク配線(31は回路動
作に使用されるアルミニウム信号配線14)、(5)と
ダイシングライン(6)との間のP 13 G [9]
の存在しない領域でチップのダイシングライン(6)の
全内周に沿って設けられている。第1図に示すチップを
樹脂封止することにより樹脂封止型半導体集積回路装置
が構成される0 次に、上記実施例の作用について第2図を参照して説明
する。第2図におけるアルミニウム信号配線(4)、(
6)は水に浸された場合、腐食し断線する恐れがあるた
め、縦方向からの浸入に対しては表面をパシベーション
膜(7)によって保護しであるので問題ないが、横方向
からの浸入に対しては、ダイシングライン(6)上には
パシベーション膜がないため、ダイシングライン(6)
から半導体基板(1]とパシベーション膜(7)との間
を通って矢印(8)方向に水が浸入する。このダイシン
グライン(6)よシ浸入する水に対して以下のような対
、処を施した。
P 13 G between aluminum wiring not used for circuit operation (31 is aluminum signal wiring 14 used for circuit operation), (5) and dicing line (6) [9]
It is provided along the entire inner periphery of the dicing line (6) of the chip in a region where the dicing line (6) does not exist. A resin-sealed semiconductor integrated circuit device is constructed by resin-sealing the chip shown in FIG. 1. Next, the operation of the above embodiment will be explained with reference to FIG. 2. Aluminum signal wiring (4), (
If 6) is immersed in water, there is a risk of corrosion and wire breakage, so the surface is protected by a passivation film (7) to prevent ingress from the vertical direction, so there is no problem, but ingress from the horizontal direction , since there is no passivation film on the dicing line (6), the dicing line (6)
Water enters in the direction of the arrow (8) through between the semiconductor substrate (1) and the passivation film (7). was applied.

回路動作に直接関係しないアルミニウム配線(3)によ
って水及び水に含まれる各種イオンを消費させ、また構
造上の障壁として内部への水及び水に含まれる各種イオ
ンの浸入を妨げることができる。さらに、P S G 
+91を内部へ後退させることにより、PSet91と
水との反応によって生成するリン酸から内部の回路動作
に必要なアルミニウム信号配線+41.+51”保護す
ることができる。
The aluminum wiring (3), which is not directly related to circuit operation, consumes water and various ions contained in water, and serves as a structural barrier to prevent water and various ions contained in water from entering the interior. Furthermore, P S G
By retreating +91 to the inside, the aluminum signal wiring +41. +41 necessary for internal circuit operation is removed from phosphoric acid generated by the reaction between PSet91 and water. +51” protection.

なお、上記実施例では半導体集積回路として、アルミニ
ウム信号配線(4)、(5)のみを有するものについて
説明したが、この発明はどのような半導体集積回路にも
適用可能である。
In the above embodiment, a semiconductor integrated circuit having only aluminum signal wirings (4) and (5) has been described, but the present invention can be applied to any semiconductor integrated circuit.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば回路動作に使用される
アルミニウム信号配線1Ps()?介して設けた半導体
集積回路に於て上記アルミニウム信号配線と半導体チッ
プのダイシングラインとの間のPSGの存在しない領域
に回路動作に使用されないアルミニウム配線を設けたの
で、樹脂封止型半導体集積回路装置の耐湿性を高−め得
る効果がある。
As described above, according to the present invention, the aluminum signal wiring 1Ps()? used for circuit operation? In the semiconductor integrated circuit provided through the wafer, aluminum wiring that is not used for circuit operation is provided in the area where PSG does not exist between the aluminum signal wiring and the dicing line of the semiconductor chip. It has the effect of increasing the moisture resistance of.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による半導体集積回路の平
面図、第2図は第1図の■−■線による拡大断面図であ
る。 図中111は半導体基板、(21は絶縁膜、(3)は回
路動作に直接関係しないアルミニウム配線、+41、(
6)はアルミニウム配線配線、(6)はダイシングライ
ン、(7)はパシベーション膜、(8)は浸入する水の
径路、(9)はPSGである。 なお、図中、同一符号は同一、又は泪当部分を示す。
FIG. 1 is a plan view of a semiconductor integrated circuit according to an embodiment of the present invention, and FIG. 2 is an enlarged cross-sectional view taken along the line ■--■ in FIG. In the figure, 111 is a semiconductor substrate, (21 is an insulating film, (3) is an aluminum wiring not directly related to circuit operation, +41, (
6) is an aluminum interconnect, (6) is a dicing line, (7) is a passivation film, (8) is a path for infiltrating water, and (9) is a PSG. In addition, in the drawings, the same reference numerals indicate the same or similar parts.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体集積回路チップを樹脂封止して成る樹脂封
止型半導体装置に於て、半導体基板上に少なくともPS
Gを介して、回路動作に使用されるアルミニウム信号配
線を設け、上記半導体チップのダイシングラインと上記
アルミニウム信号配線との間にPSGの存在しない領域
を設け、さらにその上に回路動作に使用されないアルミ
ニウム配線を前記PSGに接触されないように設けたこ
とを特徴とする半導体集積回路装置。
(1) In a resin-sealed semiconductor device formed by resin-sealing a semiconductor integrated circuit chip, at least PS is placed on the semiconductor substrate.
An aluminum signal wiring used for circuit operation is provided through the G, a region where no PSG is present is provided between the dicing line of the semiconductor chip and the aluminum signal wiring, and an aluminum signal wiring that is not used for circuit operation is provided above the aluminum signal wiring that is not used for circuit operation. A semiconductor integrated circuit device, characterized in that wiring is provided so as not to come into contact with the PSG.
(2)回路動作に使用されないアルミニウム配線をダイ
シングライン全内周に沿つて設けたことを特徴とする特
許請求の範囲第1項記載の半導体集積回路装置。
(2) The semiconductor integrated circuit device according to claim 1, wherein aluminum wiring that is not used for circuit operation is provided along the entire inner circumference of the dicing line.
JP21545385A 1985-09-27 1985-09-27 Semiconductor integrated circuit device Pending JPS6276536A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21545385A JPS6276536A (en) 1985-09-27 1985-09-27 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21545385A JPS6276536A (en) 1985-09-27 1985-09-27 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6276536A true JPS6276536A (en) 1987-04-08

Family

ID=16672615

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21545385A Pending JPS6276536A (en) 1985-09-27 1985-09-27 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6276536A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157065A (en) * 1974-06-07 1975-12-18
JPS5893324A (en) * 1981-11-30 1983-06-03 Nec Corp Semiconductive device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50157065A (en) * 1974-06-07 1975-12-18
JPS5893324A (en) * 1981-11-30 1983-06-03 Nec Corp Semiconductive device

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