JPS627739U - - Google Patents

Info

Publication number
JPS627739U
JPS627739U JP9720385U JP9720385U JPS627739U JP S627739 U JPS627739 U JP S627739U JP 9720385 U JP9720385 U JP 9720385U JP 9720385 U JP9720385 U JP 9720385U JP S627739 U JPS627739 U JP S627739U
Authority
JP
Japan
Prior art keywords
control pulse
master control
cvcf
section
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9720385U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9720385U priority Critical patent/JPS627739U/ja
Publication of JPS627739U publication Critical patent/JPS627739U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Feedback Control In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は従来の受信回路図である。 1……受信部、2……発振器部、3……分配器
、5……単安定マルチバイブレータ、6……スイ
ツチ回路、UJT……ユニジヤンクシヨントラン
ジスタ、C……充放電用コンデンサ。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a conventional receiving circuit diagram. 1... Receiving section, 2... Oscillator section, 3... Distributor, 5... Monostable multivibrator, 6... Switch circuit, UJT... Unijunction transistor, C... Charging/discharging capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マスター制御パルスを複数のCVCF電源の運
転制御パルスとする並列運転装置において、前記
各CVCF電源の制御パルス受信回路は、マスタ
ー制御パルスを受信する受信部と、単機運転制御
パルスを発生する発振器部と、前記受信部からの
マスター制御パルスと前記発振器部からの単機運
転制御パルスとの論理和で取込んで主回路素子の
ドライブ信号を得る分配器と、前記受信部からの
マスター制御パルスを取込み該制御パルスの消滅
で前記発振器部を該制御パルスに同期したタイミ
ングで発振動作させる発振制御回路とを備えたこ
とを特徴とするマスター制御方式によるCVCF
電源の並列運転装置。
In a parallel operation device in which a master control pulse is used as an operation control pulse for a plurality of CVCF power supplies, the control pulse receiving circuit of each CVCF power supply includes a receiving section that receives the master control pulse, and an oscillator section that generates a single machine operation control pulse. , a distributor that obtains a drive signal for the main circuit element by taking in the master control pulse from the receiving section and the single machine operation control pulse from the oscillator section by a logical sum; A CVCF using a master control method, comprising: an oscillation control circuit that causes the oscillator unit to oscillate at a timing synchronized with the control pulse when the control pulse disappears.
Parallel operation device for power supplies.
JP9720385U 1985-06-26 1985-06-26 Pending JPS627739U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9720385U JPS627739U (en) 1985-06-26 1985-06-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9720385U JPS627739U (en) 1985-06-26 1985-06-26

Publications (1)

Publication Number Publication Date
JPS627739U true JPS627739U (en) 1987-01-17

Family

ID=30963913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9720385U Pending JPS627739U (en) 1985-06-26 1985-06-26

Country Status (1)

Country Link
JP (1) JPS627739U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465874U (en) * 1990-10-16 1992-06-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465874U (en) * 1990-10-16 1992-06-09

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