JPS6281072U - - Google Patents

Info

Publication number
JPS6281072U
JPS6281072U JP17278285U JP17278285U JPS6281072U JP S6281072 U JPS6281072 U JP S6281072U JP 17278285 U JP17278285 U JP 17278285U JP 17278285 U JP17278285 U JP 17278285U JP S6281072 U JPS6281072 U JP S6281072U
Authority
JP
Japan
Prior art keywords
printed board
input terminal
voltage
reference voltage
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17278285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17278285U priority Critical patent/JPS6281072U/ja
Publication of JPS6281072U publication Critical patent/JPS6281072U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Measurement Of Resistance Or Impedance (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の試験装置原理ブロツク図、第
2図は本考案の実施例図、第3図は従来の入力抵
抗試験方式図である。 第1図において、1は抵抗、2は基準電圧Vs
、3はコンパレータ、4は被験試IC、5は定電
圧、5Aは試験用定電圧電源である。
FIG. 1 is a block diagram of the principle of the test device of the present invention, FIG. 2 is a diagram of an embodiment of the present invention, and FIG. 3 is a diagram of a conventional input resistance test method. In Fig. 1, 1 is a resistance, 2 is a reference voltage Vs
, 3 is a comparator, 4 is a test IC, 5 is a constant voltage, and 5A is a constant voltage power supply for testing.

Claims (1)

【実用新案登録請求の範囲】 装置に実装されたプリント板の、自動試験装置
において、 プリント板に装着されている被試験IC4の入
力端子に抵抗1を直列接続した回路に定電圧Ve
5を印加して得られるIC入力端子間電圧6と、 基準電圧Vs2とをコンパレータ3に入力し、 該IC入力端子間電圧6を基準電圧Vs2で比
較判定することを特徴とした入力抵抗試験装置。
[Claim for Utility Model Registration] In an automatic testing device for a printed board mounted on the device, a constant voltage Ve is applied to a circuit in which a resistor 1 is connected in series to the input terminal of an IC under test 4 mounted on the printed board.
5 and a reference voltage Vs2 are input to a comparator 3, and the IC input terminal voltage 6 is compared and judged with the reference voltage Vs2. .
JP17278285U 1985-11-08 1985-11-08 Pending JPS6281072U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17278285U JPS6281072U (en) 1985-11-08 1985-11-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17278285U JPS6281072U (en) 1985-11-08 1985-11-08

Publications (1)

Publication Number Publication Date
JPS6281072U true JPS6281072U (en) 1987-05-23

Family

ID=31109631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17278285U Pending JPS6281072U (en) 1985-11-08 1985-11-08

Country Status (1)

Country Link
JP (1) JPS6281072U (en)

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