JPS6281093U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the auto snooze bell alarm clock according to the present invention, Fig. 2 is a waveform diagram showing the attenuation signal sent out by the motor drive one shot circuit in this circuit, and Fig. FIG. 4 is a waveform diagram showing the voltages input to the comparator and compared through the short-time charging circuit and long-time discharging circuit in the circuit. FIG. 4 is a circuit diagram showing another embodiment of this auto snooze bell alarm clock. 1... Reference switch, 3... Voltage booster circuit, 4... Oscillation circuit, 5... Motor drive circuit, 6... DC motor,
41...Short time charging circuit, 42...Long time discharging circuit,
43, 44... Comparator, 45... 1 shot circuit for motor drive.

Claims (1)

[Scope of utility model registration request] a bell-striking device that generates a bell-sounding sound; a long-term integration means that produces a first integral output that increases or decreases with a relatively long time constant from the time when the alarm time is reached; short-time integrating means for producing a second integral output that decreases or increases with a shorter time constant than the integral output; and short-time integrating means that operates at a point where the first integral output and the second integral output coincide. 1. An auto snooze bell alarm clock comprising attenuation signal generating means for generating a attenuation signal for resetting the integral operation of the bell striking device and gradually silencing the ringing sound by driving the bell striking device.