JPS6284882U - - Google Patents
Info
- Publication number
- JPS6284882U JPS6284882U JP17787685U JP17787685U JPS6284882U JP S6284882 U JPS6284882 U JP S6284882U JP 17787685 U JP17787685 U JP 17787685U JP 17787685 U JP17787685 U JP 17787685U JP S6284882 U JPS6284882 U JP S6284882U
- Authority
- JP
- Japan
- Prior art keywords
- reset signal
- switching transistor
- microcomputer
- led
- generating circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Audible And Visible Signals (AREA)
- Feedback Control In General (AREA)
- Digital Computer Display Output (AREA)
Description
第１図は本考案に係るＬＥＤ駆動回路の一実施
例を示す回路図、第２図は該回路のタイムチヤー
トを示す。
１……マイクロコンピユータ、７……駆動電流
供給回路、５……スイツチングトランジスタ、３
……リセツト信号発生回路、６……ダイオード。
FIG. 1 is a circuit diagram showing an embodiment of an LED driving circuit according to the present invention, and FIG. 2 is a time chart of the circuit. 1...Microcomputer, 7...Drive current supply circuit, 5...Switching transistor, 3
...Reset signal generation circuit, 6...Diode.
Claims (1)
電流の通電をＯＮ―ＯＦＦする電流供給用スイツ
チングトランジスタ５と、該スイツチングトラン
ジスタ５の動作を制御するマイクロコンピユータ
１と、マイクロコンピユータ１に電源が投入され
た時点から一定時間経過後にＬレベルからＨレベ
ルへ切り替わるリセツト信号をマイクロコンピユ
ータ１のリセツト信号入力端子に供給するリセツ
ト信号発生回路３とを具え、前記スイツチングト
ランジスタ５のベースとリセツト信号発生回路３
との間には、スイツチングトランジスタからリセ
ツト信号発生回路へ向かう方向を順方向とする整
流器が介装されていることを特徴とするＬＥＤ駆
動回路。 Power is applied to the LED to be blink-controlled, the current supply switching transistor 5 that turns on and off the driving current to the LED, the microcomputer 1 that controls the operation of the switching transistor 5, and the microcomputer 1. The reset signal generating circuit 3 supplies a reset signal that switches from the L level to the H level after a certain period of time has elapsed from the point in time, to the reset signal input terminal of the microcomputer 1, and the base of the switching transistor 5 and the reset signal generating circuit 3
1. An LED driving circuit characterized in that a rectifier is interposed between the switching transistor and the reset signal generating circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17787685U JPS6284882U (en) | 1985-11-18 | 1985-11-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17787685U JPS6284882U (en) | 1985-11-18 | 1985-11-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6284882U true JPS6284882U (en) | 1987-05-30 |
Family
ID=31119486
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17787685U Pending JPS6284882U (en) | 1985-11-18 | 1985-11-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6284882U (en) |
-
1985
- 1985-11-18 JP JP17787685U patent/JPS6284882U/ja active Pending