JPS6285025U - - Google Patents
Info
- Publication number
- JPS6285025U JPS6285025U JP17703785U JP17703785U JPS6285025U JP S6285025 U JPS6285025 U JP S6285025U JP 17703785 U JP17703785 U JP 17703785U JP 17703785 U JP17703785 U JP 17703785U JP S6285025 U JPS6285025 U JP S6285025U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- input
- input signal
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims 2
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electronic Switches (AREA)
Description
第１図は、本考案の一実施例を示す回路図、及
び第２図は従来の切換回路を示す回路図である。
主な図番の説明、８……入力ピン、９……制御
ピン、１１……トランジスタ、１２……スイツチ
、１５……出力ピン、１８……出力端子、１９…
…入力端子。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional switching circuit. Explanation of main figure numbers, 8...Input pin, 9...Control pin, 11...Transistor, 12...Switch, 15...Output pin, 18...Output terminal, 19...
...Input terminal.
Claims (1)
１入力信号を切換えるための制御信号が供給され
る制御ピンと、前記第１入力信号が供給され出力
側が低インピーダンスとなるインピーダンス変換
回路と、前記制御信号に応じて切換えられるスイ
ツチと、前記第１入力信号に応じた出力信号が得
られる出力ピンとを有する集積回路、及び第２信
号が供給される入力端子と、前記出力ピンと前記
入力端子との間に直列接続されたコンデンサ及び
抵抗と、前記コンデンサ及び抵抗の接続中点に接
続された出力端子とを有する集積回路の外付回路
を備え、前記制御信号に応じ前記スイツチをオン
させることにより、前記第１入力信号を前記スイ
ツチ及び出力ピンを介して前記出力端子に導出さ
せ、前記スイツチをオフさせることにより、前記
第２入力信号を前記抵抗を介して前記出力端子に
導出させることを特徴とする信号切換回路。 an input pin to which a first input signal is supplied; a control pin to which a control signal for switching the first input signal is supplied; an impedance conversion circuit to which the first input signal is supplied and whose output side has a low impedance; an integrated circuit having a switch that is switched in response to a signal, an output pin that provides an output signal that corresponds to the first input signal, an input terminal that is supplied with a second signal, and between the output pin and the input terminal; an external circuit of an integrated circuit having a capacitor and a resistor connected in series, and an output terminal connected to a connection midpoint of the capacitor and resistor, and turning on the switch in response to the control signal; The first input signal is led out to the output terminal via the switch and the output pin, and by turning off the switch, the second input signal is led out to the output terminal via the resistor. Signal switching circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17703785U JPH042502Y2 (en) | 1985-11-18 | 1985-11-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17703785U JPH042502Y2 (en) | 1985-11-18 | 1985-11-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6285025U true JPS6285025U (en) | 1987-05-30 |
| JPH042502Y2 JPH042502Y2 (en) | 1992-01-28 |
Family
ID=31117860
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17703785U Expired JPH042502Y2 (en) | 1985-11-18 | 1985-11-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH042502Y2 (en) |
-
1985
- 1985-11-18 JP JP17703785U patent/JPH042502Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH042502Y2 (en) | 1992-01-28 |